intel_adsp: some SoCs boot core0 differently

Make the boot process CAVS specific. Signed-off-by: Anas Nashif <[email protected]>
thedjnK · Mar 1, 2022 · 79f86ad · 79f86ad
1 parent 6e10011
commit 79f86ad
Showing 1 changed file with 6 additions and 4 deletions.
diff --git a/soc/xtensa/intel_adsp/common/boot.c b/soc/xtensa/intel_adsp/common/boot.c
@@ -163,7 +163,7 @@ static __imr void parse_module(struct sof_man_fw_header *hdr,
 #define MAN_SKIP_ENTRIES 1
 
 /* parse FW manifest and copy modules */
-static __imr void parse_manifest(void)
+__imr void parse_manifest(void)
 {
 	struct sof_man_fw_desc *desc =
 		(struct sof_man_fw_desc *)CONFIG_IMR_MANIFEST_ADDR;
@@ -251,7 +251,7 @@ static __imr void hp_sram_pm_banks(uint32_t banks)
 #endif
 }
 
-static __imr void hp_sram_init(uint32_t memory_size)
+__imr void hp_sram_init(uint32_t memory_size)
 {
 	uint32_t ebb_in_use;
 
@@ -265,7 +265,7 @@ static __imr void hp_sram_init(uint32_t memory_size)
 	bbzero((void *)L2_SRAM_BASE, L2_SRAM_SIZE);
 }
 
-static __imr void lp_sram_init(void)
+__imr void lp_sram_init(void)
 {
 #ifdef PLATFORM_INIT_LPRSRAM
 	uint32_t timeout_counter, delay_count = 256;
@@ -294,7 +294,7 @@ static __imr void lp_sram_init(void)
 #endif
 }
 
-static __imr void win_setup(void)
+__imr void win_setup(void)
 {
 	uint32_t *win0 = z_soc_uncached_ptr((void *)HP_SRAM_WIN0_BASE);
 
@@ -310,6 +310,7 @@ static __imr void win_setup(void)
 			     | CAVS_DMWBA_ENABLE);
 }
 
+#ifdef CONFIG_INTEL_ADSP_CAVS
 __imr void boot_core0(void)
 {
 	cpu_early_init();
@@ -333,3 +334,4 @@ __imr void boot_core0(void)
 	extern FUNC_NORETURN void z_cstart(void);
 	z_cstart();
 }
+#endif