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Add device tree source for mt7621 and gnubee1 to make testing easier. Signed-off-by: NeilBrown <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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config DTB_GNUBEE1 | ||
bool "GnuBee1 NAS" | ||
depends on SOC_MT7621 && DTB_RT_NONE | ||
select BUILTIN_DTB | ||
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dtb-$(CONFIG_DTB_GNUBEE1) += gbpc1.dtb | ||
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obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y)) |
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- ensure all usage matches code | ||
- ensure all features used are documented | ||
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Cc: NeilBrown <[email protected]> |
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/dts-v1/; | ||
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#include "mt7621.dtsi" | ||
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#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/input/input.h> | ||
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/ { | ||
compatible = "gnubee,gb-pc1", "mediatek,mt7621-soc"; | ||
model = "GB-PC1"; | ||
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memory@0 { | ||
device_type = "memory"; | ||
reg = <0x0 0x1c000000>, <0x20000000 0x4000000>; | ||
}; | ||
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chosen { | ||
bootargs = "console=ttyS0,57600"; | ||
}; | ||
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palmbus: palmbus@1E000000 { | ||
i2c@900 { | ||
status = "okay"; | ||
}; | ||
}; | ||
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gpio-keys-polled { | ||
compatible = "gpio-keys-polled"; | ||
#address-cells = <1>; | ||
#size-cells = <0>; | ||
poll-interval = <20>; | ||
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reset { | ||
label = "reset"; | ||
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; | ||
linux,code = <KEY_RESTART>; | ||
}; | ||
}; | ||
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gpio-leds { | ||
compatible = "gpio-leds"; | ||
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system { | ||
label = "gb-pc1:green:system"; | ||
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; | ||
}; | ||
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status { | ||
label = "gb-pc1:green:status"; | ||
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>; | ||
}; | ||
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lan1 { | ||
label = "gb-pc1:green:lan1"; | ||
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>; | ||
}; | ||
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lan2 { | ||
label = "gb-pc1:green:lan2"; | ||
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
}; | ||
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&sdhci { | ||
status = "okay"; | ||
}; | ||
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&spi0 { | ||
status = "okay"; | ||
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m25p80@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "jedec,spi-nor"; | ||
reg = <0>; | ||
spi-max-frequency = <10000000>; | ||
m25p,chunked-io = <32>; | ||
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partition@0 { | ||
label = "u-boot"; | ||
reg = <0x0 0x30000>; | ||
read-only; | ||
}; | ||
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partition@30000 { | ||
label = "u-boot-env"; | ||
reg = <0x30000 0x10000>; | ||
read-only; | ||
}; | ||
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factory: partition@40000 { | ||
label = "factory"; | ||
reg = <0x40000 0x10000>; | ||
read-only; | ||
}; | ||
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partition@50000 { | ||
label = "firmware"; | ||
reg = <0x50000 0xFB0000>; | ||
}; | ||
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}; | ||
}; | ||
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&sysclock { | ||
compatible = "fixed-clock"; | ||
clock-frequency = <90000000>; | ||
}; | ||
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&cpuclock { | ||
compatible = "fixed-clock"; | ||
clock-frequency = <900000000>; | ||
}; | ||
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&pcie { | ||
status = "okay"; | ||
}; | ||
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ðernet { | ||
//mtd-mac-address = <&factory 0xe000>; | ||
gmac1: mac@0 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <0>; | ||
phy-handle = <&phy1>; | ||
}; | ||
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mdio-bus { | ||
phy1: ethernet-phy@1 { | ||
reg = <1>; | ||
phy-mode = "rgmii"; | ||
}; | ||
}; | ||
}; | ||
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&pinctrl { | ||
state_default: pinctrl0 { | ||
gpio { | ||
ralink,group = "wdt", "rgmii2", "uart3"; | ||
ralink,function = "gpio"; | ||
}; | ||
}; | ||
}; |
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