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Commits on Jul 3, 2014

• [CostModel][x86] Improved cost model for alternate shuffles.

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• [X86] Add ISel patterns to select 'f32_to_f16' and 'f16_to_f32' dag nodes.

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Commits on Jun 30, 2014

• [X86] Add support for builtin to read performance monitoring counters.

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Commits on Jun 26, 2014

• Silence a warning due to a comparison between signed and unsigned.

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• [X86] Improve the selection of SSE3/AVX addsub instructions.

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Commits on Jun 25, 2014

• [X86] Always prefer to lower a VECTOR_SHUFFLE into a BLENDI instead of SHUFP (or VPERM2X128).

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• [X86] Add target combine rule to select ADDSUB instructions from a build_vector

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Commits on Jun 21, 2014

• [X86] Add ISel patterns to select SSE3/AVX ADDSUB instructions.

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Commits on Jun 19, 2014

• [X86] Teach how to combine horizontal binop even in the presence of undefs.

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Commits on Jun 12, 2014

• [X86] Teach how to dump the name of target node RDTSCP_DAG.

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• [X86] Teach how to combine AVX and AVX2 horizontal binop on packed 256-bit vectors.

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Commits on Jun 11, 2014

• [X86] Refactor the logic to select horizontal adds/subs to a helper function.

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Commits on Jun 10, 2014

• [X86] Improved target combine rules for selecting horizontal add/sub.

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Commits on Jun 9, 2014

• [X86] Add target combine rules for horizontal add/sub.

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• [X86] Avoid emitting unnecessary test instructions.

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• [DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact flags to SelectionDAG.

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Commits on Jun 2, 2014

• [X86] Fix checked arithmetic for i8 on X86.

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Commits on May 30, 2014

• [X86] Add two combine rules to simplify dag nodes introduced during type legalization when promoting nodes with illegal vector type.

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Commits on May 22, 2014

• [X86] Improve the lowering of BITCAST from MVT::f64 to MVT::v4i16/MVT::v8i8.

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Commits on May 19, 2014

• [X86] Add ISel patterns to improve the selection of TZCNT and LZCNT.

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Commits on May 15, 2014

• [X86] Teach the backend how to fold SSE4.1/AVX/AVX2 blend intrinsics.

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Commits on May 9, 2014

• Fix 80 col violation.

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Commits on May 8, 2014

• [X86] Add target specific combine rules to fold SSE2/AVX2 packed arithmetic shift intrinsics.

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Commits on May 6, 2014

• [X86] Improve the lowering of BITCAST dag nodes from type f64 to type v2i32 (and vice versa).

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Commits on Apr 29, 2014

• [Windows] Fix assertion failure when passing 'nul' in input to clang.

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Commits on Apr 26, 2014

• [InstCombine][X86] Teach how to fold calls to SSE2/AVX2 packed logical shift

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Commits on Apr 24, 2014

• [X86] Add support for Read Time Stamp Counter x86 builtin intrinsics.

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Commits on Apr 15, 2014

• [X86] Improve the lowering of packed shifts by constant build_vector.

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Commits on Mar 22, 2014

• [DAG] Fix an assertion failure caused by an invalid cast in method 'BuildVectorSDNode::isConstantSplat'

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Commits on Mar 18, 2014

• [DAGCombiner] teach how to simplify xor/and/or nodes according to the following rules:

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Commits on Mar 6, 2014

• [X86] Teach the DAGCombiner how to fold a OR of two shufflevector nodes.

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Commits on Feb 12, 2014

• [Vectorizer] Add a new 'OperandValueKind' in TargetTransformInfo called

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• [X86] Teach the backend how to lower vector shift left into multiply rather than scalarizing it.

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Commits on Jan 28, 2014

• [X86] Add extra rules for combining vselect dag nodes into movsd.

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• [DAGCombiner] Avoid introducing an illegal build_vector when folding a sign_extend.

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