Added tests for clocks. Added remove scope and special chars passes. …

…Added tests. Made more tests pass

Makefile

@@ -52,7 +52,7 @@ units = ALUTop Datapath Control Core
 v     = $(addsuffix .fir.v, $(units))
 
 $(units): % :
-	firrtl -X verilog -i test/chisel3/$*.fir -o test/chisel3/$*.fir.v
+	firrtl -X verilog -i test/chisel3/$*.fir -o test/chisel3/$*.fir.v -p c
 	scp test/chisel3/$*.fir.v adamiz@a5:/scratch/adamiz/firrtl-all/riscv-mini/generated-src/$*.v
 
 done:

notes/alpha.txt

@@ -0,0 +1,77 @@
+========= RENAME STRATEGY =========
+Special chars ~!@#$%^*-_+=?/ get renamed to _XX, where XX is a hex representation of the symbol
+
+a_x 
+=> 
+a_XXx
+
+a_XXx 
+=> 
+a_XXXXx
+
+This guarantees all symbols use a subset of the character set
+
+Now, I need to rename duplicate symbols, so:
+
+wire x
+when p
+  wire x
+
+=>
+
+wire x%0
+when p
+  wire x%1
+
+We know that all new symbols are unique because they use a special character
+At this point, all names are unique.
+
+-- Bundle Expansion --
+To deal with bundle expansion, use another different special character:
+
+wire x : {a,b}
+
+=>
+
+wire x#a
+wire x#b
+
+-- Vector Expansion --
+
+To deal with bundle expansion, use another different special character:
+
+wire x : UInt<1>[3]
+
+=>
+
+wire x$0 : UInt<1>
+wire x$1 : UInt<1>
+wire x$2 : UInt<1>
+
+-- Creating Temporaries --
+To deal with creating temporaries, use another different special character:
+
+node x = a + b * c
+=>
+node x!0 = b * c
+node x!1 = a + x!0
+node x = x!1
+
+Finally, to deal with backends that only use subsets of the special characters, do another rename step to remove special characters (must remove $ again!)
+
+ASCII Hex
+_ 5F __
+~ 7E _A
+! 21 _B
+@ 40 _C
+# 23 _D
+$ 24 _E
+% 25 _F
+^ 5E _G
+* 2A _H
+- 2D _I
++ 2B _J
+= 3D _K
+? 3F _L
+/ 2F _M
+

src/main/stanza/compilers.stanza

@@ -12,10 +12,11 @@ public defstruct StandardFlo <: Compiler :
    file: String with: (as-method => true)
 public defmethod passes (c:StandardFlo) -> List<Pass> :
    to-list $ [
-      CheckHighForm(expand-delin)
+      RemoveSpecialChars()
+      RemoveScopes()
+      CheckHighForm()
       ;; TempElimination()
       ToWorkingIR()
-      ;; MakeExplicitReset()
       ResolveKinds()
       CheckKinds()
       InferTypes()
@@ -31,9 +32,8 @@ public defmethod passes (c:StandardFlo) -> List<Pass> :
       Inline()
       SplitExp()
       ToRealIR()
-      SpecialRename(`#,`_)
-      SpecialRename(`$,`::)
-      CheckHighForm(`::)
+      RemoveSpecialChars()
+      CheckHighForm()
       CheckLowForm()
       Flo(file(c))
    ]
@@ -42,7 +42,9 @@ public defstruct StandardVerilog <: Compiler :
    file: String with: (as-method => true)
 public defmethod passes (c:StandardVerilog) -> List<Pass> :
    to-list $ [
-      CheckHighForm(expand-delin)
+      RemoveSpecialChars()
+      RemoveScopes()
+      CheckHighForm()
       TempElimination()
       ToWorkingIR()
       ;; MakeExplicitReset()
@@ -60,9 +62,8 @@ public defmethod passes (c:StandardVerilog) -> List<Pass> :
       Pad()
       SplitExp()
       ToRealIR()
-      SpecialRename(`#,`_)
-      SpecialRename(`$,`__)
-      CheckHighForm(`__)
+      RemoveSpecialChars()
+      CheckHighForm()
       CheckLowForm()
       Verilog(file(c))
    ]

src/main/stanza/custom-compiler.stanza

@@ -14,7 +14,9 @@ public defstruct InstrumentedVerilog <: Compiler :
 public defmethod passes (c:InstrumentedVerilog) -> List<Pass> :
    to-list $ [
       WhenCoverage(args(c)[0],args(c)[1])
-      CheckHighForm(expand-delin)
+      RemoveSpecialChars()
+      RemoveScopes()
+      CheckHighForm()
       TempElimination()
       ToWorkingIR()
       ;; MakeExplicitReset()
@@ -31,8 +33,8 @@ public defmethod passes (c:InstrumentedVerilog) -> List<Pass> :
       InferWidths()
       SplitExp()
       ToRealIR()
-      SpecialRename(`#,`_)
-      CheckHighForm(expand-delin)
+      RemoveSpecialChars()
+      CheckHighForm()
       CheckLowForm()
       Verilog(file(c))
    ]

src/main/stanza/errors.stanza

@@ -39,9 +39,8 @@ defpackage firrtl/errors :
 ; * Width sizes are positive
 ; * Primops have the correct number of arguments
 
-public defstruct CheckHighForm <: Pass :
-   sym : Symbol
-public defmethod pass (b:CheckHighForm) -> (Circuit -> Circuit) : check-high-form{_,sym(b)}
+public defstruct CheckHighForm <: Pass 
+public defmethod pass (b:CheckHighForm) -> (Circuit -> Circuit) : check-high-form
 public defmethod name (b:CheckHighForm) -> String : "High Form Check"
 public defmethod short-name (b:CheckHighForm) -> String : "high-form-check"
 
@@ -240,7 +239,7 @@ defn check-high-form-primop (e:DoPrim, errors:Vector<PassException>,info:FileInf
       BITS-SELECT-OP     : correct-num(1,2)
 
 ;--------------- Check High Form Pass -------------------
-public defn check-high-form (c:Circuit,sym:Symbol) -> Circuit : 
+public defn check-high-form (c:Circuit) -> Circuit : 
    val errors = Vector<PassException>()
 
    defn check-valid-loc (info:FileInfo,e:Expression) -> False :
@@ -334,7 +333,6 @@ public defn check-high-form (c:Circuit,sym:Symbol) -> Circuit :
          map(check-high-form-t{info(p),_},type(p))
          map(check-high-form-w{info(p),_},type(p))
 
-      names[`reset] = true
       match(m) :
          (m:ExModule) : false
          (m:InModule) : check-high-form-s(body(m),names)

src/main/stanza/firrtl-ir.stanza

@@ -5,8 +5,11 @@ defpackage firrtl/ir2 :
 public defmulti info! (x:?) -> FileInfo
 public defmethod info! (x:?) : FileInfo()
 
-public val expand-delin = `$
-public val gen-delin = `#
+public val vector-expand-delin = `_
+public val bundle-expand-delin = `_
+public val scope-delin = `%
+public val temp-delin = `!
+public val inline-delin = `^
 
 public definterface PortDirection
 public val INPUT = new PortDirection