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@vlsi-lab

VLSI lab - PoliTO

VLSI lab @ Dipartimento di Elettronica e Telecomunicazioni (DET) in Politecnico di Torino

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  1. len5 len5 Public

    LEN5 is a configurable, speculative, out-of-order, 64-bit RISC-V microprocessor targetting etherogeneus systems on chip.

    SystemVerilog 16 3

  2. MARLIN MARLIN Public

    MARLIN: a Co-design Methodology for Approximate ReconfigurabLe Inference of Neural Networks at the Edge

    Python 5 3

  3. area-plot-post-syn area-plot-post-syn Public

    Python 4

  4. TRNG TRNG Public

    Python 3

  5. rv_profile rv_profile Public

    Forked from LucasKl/riscv-function-profiling

    Visualize what your RISC-V core is executing

    HTML 2

  6. TestIt TestIt Public

    A tool for verifying RTL and FPGA models using custom SW applications

    Python 2

Repositories

Showing 10 of 22 repositories
  • Mage Public

    Mage: a decoupled access-execute CGRA tailored for static control applications

    vlsi-lab/Mage’s past year of commit activity
    Python 0 0 0 0 Updated Apr 3, 2025
  • TestIt Public

    A tool for verifying RTL and FPGA models using custom SW applications

    vlsi-lab/TestIt’s past year of commit activity
    Python 2 GPL-3.0 0 0 0 Updated Mar 31, 2025
  • ARCANE_OSHW25 Public
    vlsi-lab/ARCANE_OSHW25’s past year of commit activity
    0 0 0 0 Updated Mar 30, 2025
  • rv_profile Public Forked from LucasKl/riscv-function-profiling

    Visualize what your RISC-V core is executing

    vlsi-lab/rv_profile’s past year of commit activity
    HTML 2 2 0 0 Updated Mar 24, 2025
  • llvm-project Public Forked from llvm/llvm-project

    The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.

    vlsi-lab/llvm-project’s past year of commit activity
    LLVM 0 13,365 0 1 Updated Mar 20, 2025
  • x-heep-docker Public

    This repository contains the dockerfile to build the X-HEEP docker

    vlsi-lab/x-heep-docker’s past year of commit activity
    Makefile 0 1 1 2 Updated Mar 17, 2025
  • vlsi-lab/area-plot-post-syn’s past year of commit activity
    Python 4 0 0 0 Updated Mar 12, 2025
  • TRNG Public
    vlsi-lab/TRNG’s past year of commit activity
    Python 3 0 0 0 Updated Mar 7, 2025
  • GR-HEEP Public template
    vlsi-lab/GR-HEEP’s past year of commit activity
    SystemVerilog 1 2 2 1 Updated Feb 24, 2025
  • KRONOS Public
    vlsi-lab/KRONOS’s past year of commit activity
    0 0 0 0 Updated Feb 19, 2025

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