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x86: bnx2x 2.5G SGMII patch for 5.18
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target/linux/x86/patches-5.18/993-bnx2x_warpcore_8727_2_5g_sgmii_txfault.patch
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,216 @@ | ||
| --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | ||
| +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x.h | ||
| @@ -1592,6 +1592,7 @@ struct bnx2x { | ||
| uint num_ethernet_queues; | ||
| uint num_cnic_queues; | ||
| int disable_tpa; | ||
| + int mask_tx_fault; | ||
|
|
||
| u32 rx_mode; | ||
| #define BNX2X_RX_MODE_NONE 0 | ||
| --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | ||
| +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | ||
| @@ -151,6 +151,7 @@ typedef int (*read_sfp_module_eeprom_fun | ||
|
|
||
| #define SFP_EEPROM_CON_TYPE_ADDR 0x2 | ||
| #define SFP_EEPROM_CON_TYPE_VAL_UNKNOWN 0x0 | ||
| + #define SFP_EEPROM_CON_TYPE_VAL_SC 0x1 | ||
| #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 | ||
| #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 | ||
| #define SFP_EEPROM_CON_TYPE_VAL_RJ45 0x22 | ||
| @@ -4210,6 +4211,16 @@ static void bnx2x_warpcore_set_sgmii_spe | ||
| 0x1000); | ||
| DP(NETIF_MSG_LINK, "set SGMII AUTONEG\n"); | ||
| } else { | ||
| + /* Note that 2.5G works only when used with 1G advertisment */ | ||
| + if (fiber_mode && (phy->req_line_speed == SPEED_2500) && | ||
| + (phy->speed_cap_mask & | ||
| + (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | | ||
| + PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) { | ||
| + bnx2x_cl45_write(bp, phy, MDIO_WC_DEVAD, | ||
| + MDIO_WC_REG_SERDESDIGITAL_MISC1, | ||
| + 0x6010); | ||
| + } | ||
| + | ||
| bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, | ||
| MDIO_WC_REG_COMBO_IEEE0_MIICTRL, &val16); | ||
| val16 &= 0xcebf; | ||
| @@ -4220,6 +4231,7 @@ static void bnx2x_warpcore_set_sgmii_spe | ||
| val16 |= 0x2000; | ||
| break; | ||
| case SPEED_1000: | ||
| + case SPEED_2500: | ||
| val16 |= 0x0040; | ||
| break; | ||
| default: | ||
| @@ -8172,6 +8184,7 @@ static int bnx2x_get_edc_mode(struct bnx | ||
| break; | ||
| } | ||
| case SFP_EEPROM_CON_TYPE_VAL_UNKNOWN: | ||
| + case SFP_EEPROM_CON_TYPE_VAL_SC: | ||
| case SFP_EEPROM_CON_TYPE_VAL_LC: | ||
| case SFP_EEPROM_CON_TYPE_VAL_RJ45: | ||
| check_limiting_mode = 1; | ||
| @@ -8182,7 +8195,8 @@ static int bnx2x_get_edc_mode(struct bnx | ||
| (val[SFP_EEPROM_1G_COMP_CODE_ADDR] != 0)) { | ||
| DP(NETIF_MSG_LINK, "1G SFP module detected\n"); | ||
| phy->media_type = ETH_PHY_SFP_1G_FIBER; | ||
| - if (phy->req_line_speed != SPEED_1000) { | ||
| + if ((phy->req_line_speed != SPEED_1000) && | ||
| + (phy->req_line_speed != SPEED_2500)) { | ||
| u8 gport = params->port; | ||
| phy->req_line_speed = SPEED_1000; | ||
| if (!CHIP_IS_E1x(bp)) { | ||
| @@ -8342,7 +8356,7 @@ static int bnx2x_wait_for_sfp_module_ini | ||
| * some phys type ( e.g. JDSU ) | ||
| */ | ||
|
|
||
| - for (timeout = 0; timeout < 60; timeout++) { | ||
| + for (timeout = 0; timeout < 1800; timeout++) { | ||
| if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) | ||
| rc = bnx2x_warpcore_read_sfp_module_eeprom( | ||
| phy, params, I2C_DEV_ADDR_A0, 1, 1, &val, | ||
| @@ -9236,6 +9250,7 @@ static void bnx2x_8727_config_speed(stru | ||
| u16 tmp1, val; | ||
| /* Set option 1G speed */ | ||
| if ((phy->req_line_speed == SPEED_1000) || | ||
| + (phy->req_line_speed == SPEED_2500) || | ||
| (phy->media_type == ETH_PHY_SFP_1G_FIBER)) { | ||
| DP(NETIF_MSG_LINK, "Setting 1G force\n"); | ||
| bnx2x_cl45_write(bp, phy, | ||
| @@ -9245,6 +9260,22 @@ static void bnx2x_8727_config_speed(stru | ||
| bnx2x_cl45_read(bp, phy, | ||
| MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1); | ||
| DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); | ||
| + if ((phy->req_line_speed == SPEED_2500) && | ||
| + (phy->speed_cap_mask & | ||
| + (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | | ||
| + PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))) { | ||
| + bnx2x_cl45_read_and_write(bp, phy, | ||
| + MDIO_AN_DEVAD, | ||
| + MDIO_AN_REG_8727_MISC_CTRL2, | ||
| + ~(1<<5)); | ||
| + bnx2x_cl45_write(bp, phy, | ||
| + MDIO_AN_DEVAD, | ||
| + MDIO_AN_REG_8727_MISC_CTRL1, 0x0010); | ||
| + } else { | ||
| + bnx2x_cl45_write(bp, phy, | ||
| + MDIO_AN_DEVAD, | ||
| + MDIO_AN_REG_8727_MISC_CTRL1, 0x001C); | ||
| + } | ||
| /* Power down the XAUI until link is up in case of dual-media | ||
| * and 1G | ||
| */ | ||
| @@ -9266,7 +9297,7 @@ static void bnx2x_8727_config_speed(stru | ||
|
|
||
| DP(NETIF_MSG_LINK, "Setting 1G clause37\n"); | ||
| bnx2x_cl45_write(bp, phy, | ||
| - MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, 0); | ||
| + MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2, 0); | ||
| bnx2x_cl45_write(bp, phy, | ||
| MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); | ||
| } else { | ||
| @@ -9274,9 +9305,12 @@ static void bnx2x_8727_config_speed(stru | ||
| * registers although it is default | ||
| */ | ||
| bnx2x_cl45_write(bp, phy, | ||
| - MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL, | ||
| + MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL2, | ||
| 0x0020); | ||
| bnx2x_cl45_write(bp, phy, | ||
| + MDIO_AN_DEVAD, MDIO_AN_REG_8727_MISC_CTRL1, | ||
| + 0x001C); | ||
| + bnx2x_cl45_write(bp, phy, | ||
| MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x0100); | ||
| bnx2x_cl45_write(bp, phy, | ||
| MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0x2040); | ||
| @@ -9565,6 +9599,11 @@ static u8 bnx2x_8727_read_status(struct | ||
| vars->line_speed = SPEED_10000; | ||
| DP(NETIF_MSG_LINK, "port %x: External link up in 10G\n", | ||
| params->port); | ||
| + } else if ((link_status & (1<<1)) && (!(link_status & (1<<14)))) { | ||
| + link_up = 1; | ||
| + vars->line_speed = SPEED_2500; | ||
| + DP(NETIF_MSG_LINK, "port %x: External link up in 2.5G\n", | ||
| + params->port); | ||
| } else if ((link_status & (1<<0)) && (!(link_status & (1<<13)))) { | ||
| link_up = 1; | ||
| vars->line_speed = SPEED_1000; | ||
| @@ -9596,7 +9635,8 @@ static u8 bnx2x_8727_read_status(struct | ||
| } | ||
|
|
||
| if ((DUAL_MEDIA(params)) && | ||
| - (phy->req_line_speed == SPEED_1000)) { | ||
| + ((phy->req_line_speed == SPEED_1000) || | ||
| + (phy->req_line_speed == SPEED_2500))) { | ||
| bnx2x_cl45_read(bp, phy, | ||
| MDIO_PMA_DEVAD, | ||
| MDIO_PMA_REG_8727_PCS_GP, &val1); | ||
| @@ -11720,6 +11760,7 @@ static const struct bnx2x_phy phy_warpco | ||
| SUPPORTED_100baseT_Full | | ||
| SUPPORTED_1000baseT_Full | | ||
| SUPPORTED_1000baseKX_Full | | ||
| + SUPPORTED_2500baseX_Full | | ||
| SUPPORTED_10000baseT_Full | | ||
| SUPPORTED_10000baseKR_Full | | ||
| SUPPORTED_20000baseKR2_Full | | ||
| @@ -11906,6 +11947,7 @@ static const struct bnx2x_phy phy_8727 = | ||
| .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff}, | ||
| .mdio_ctrl = 0, | ||
| .supported = (SUPPORTED_10000baseT_Full | | ||
| + SUPPORTED_2500baseX_Full | | ||
| SUPPORTED_1000baseT_Full | | ||
| SUPPORTED_FIBRE | | ||
| SUPPORTED_Pause | | ||
| @@ -12253,6 +12295,7 @@ static int bnx2x_populate_int_phy(struct | ||
| break; | ||
| case PORT_HW_CFG_NET_SERDES_IF_SFI: | ||
| phy->supported &= (SUPPORTED_1000baseT_Full | | ||
| + SUPPORTED_2500baseX_Full | | ||
| SUPPORTED_10000baseT_Full | | ||
| SUPPORTED_FIBRE | | ||
| SUPPORTED_Pause | | ||
| @@ -13937,7 +13980,8 @@ void bnx2x_period_func(struct link_param | ||
| & PORT_HW_CFG_NET_SERDES_IF_MASK) == | ||
| PORT_HW_CFG_NET_SERDES_IF_SFI) { | ||
| if (bnx2x_is_sfp_module_plugged(phy, params)) { | ||
| - bnx2x_sfp_tx_fault_detection(phy, params, vars); | ||
| + if(!((params->port + 1) & bp->mask_tx_fault)) | ||
| + bnx2x_sfp_tx_fault_detection(phy, params, vars); | ||
| } else if (vars->link_status & | ||
| LINK_STATUS_SFP_TX_FAULT) { | ||
| /* Clean trail, interrupt corrects the leds */ | ||
| --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | ||
| +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c | ||
| @@ -113,6 +113,10 @@ static int disable_tpa; | ||
| module_param(disable_tpa, int, 0444); | ||
| MODULE_PARM_DESC(disable_tpa, " Disable the TPA (LRO) feature"); | ||
|
|
||
| +static int mask_tx_fault; | ||
| +module_param(mask_tx_fault, int, 0444); | ||
| +MODULE_PARM_DESC(mask_tx_fault, " Mask SFP TX fault detection"); | ||
| + | ||
| static int int_mode; | ||
| module_param(int_mode, int, 0444); | ||
| MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " | ||
| @@ -12336,6 +12340,8 @@ static int bnx2x_init_bp(struct bnx2x *b | ||
| if (BP_NOMCP(bp) && (func == 0)) | ||
| dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n"); | ||
|
|
||
| + bp->mask_tx_fault = mask_tx_fault; | ||
| + | ||
| bp->disable_tpa = disable_tpa; | ||
| bp->disable_tpa |= !!IS_MF_STORAGE_ONLY(bp); | ||
| /* Reduce memory usage in kdump environment by disabling TPA */ | ||
| --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | ||
| +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h | ||
| @@ -7169,7 +7169,8 @@ Theotherbitsarereservedandshouldbezero*/ | ||
| #define MDIO_PMA_REG_8727_PCS_GP 0xc842 | ||
| #define MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4 | ||
|
|
||
| -#define MDIO_AN_REG_8727_MISC_CTRL 0x8309 | ||
| +#define MDIO_AN_REG_8727_MISC_CTRL1 0x8308 | ||
| +#define MDIO_AN_REG_8727_MISC_CTRL2 0x8309 | ||
|
|
||
| #define MDIO_PMA_REG_8073_CHIP_REV 0xc801 | ||
| #define MDIO_PMA_REG_8073_SPEED_LINK_STATUS 0xc820 |