Generate ELF Note for BTI in all arm64 asm files

Add program property note section in the assembly files to ensure that when linking them, program property note section is generated in the final ELF. Signed-off-by: Ruchika Gupta <[email protected]> Acked-by: Jens Wiklander <[email protected]>
vstehle · Dec 22, 2021 · 181f849 · 181f849
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diff --git a/core/arch/arm/crypto/aes_modes_armv8a_ce_a64.S b/core/arch/arm/crypto/aes_modes_armv8a_ce_a64.S
@@ -660,3 +660,5 @@ FUNC ce_aes_xor_block , :
 	st1	{v0.16b}, [x0]
 	ret
 END_FUNC ce_aes_xor_block
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/crypto/ghash-ce-core_a64.S b/core/arch/arm/crypto/ghash-ce-core_a64.S
@@ -646,3 +646,5 @@ FUNC pmull_gcm_aes_sub , :
 	umov	w0, v0.s[0]
 	ret
 END_FUNC pmull_gcm_aes_sub
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/crypto/sha1_armv8a_ce_a64.S b/core/arch/arm/crypto/sha1_armv8a_ce_a64.S
@@ -121,3 +121,5 @@ FUNC sha1_ce_transform , :
 .Lsha1_rcon:
 	.word		0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6
 END_FUNC sha1_ce_transform
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/crypto/sha256_armv8a_ce_a64.S b/core/arch/arm/crypto/sha256_armv8a_ce_a64.S
@@ -132,3 +132,5 @@ FUNC sha256_ce_transform , :
 	.word		0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208
 	.word		0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
 END_FUNC sha256_ce_transform
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/cache_helpers_a64.S b/core/arch/arm/kernel/cache_helpers_a64.S
@@ -237,3 +237,5 @@ loop_ic_inv:
 	ret
 
 END_FUNC icache_inv_range
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/entry_a64.S b/core/arch/arm/kernel/entry_a64.S
@@ -576,3 +576,5 @@ SErrorA32:
 	check_vector_size SErrorA32
 
 END_FUNC reset_vect_table
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/misc_a64.S b/core/arch/arm/kernel/misc_a64.S
@@ -51,3 +51,5 @@ WEAK_FUNC get_core_pos_mpidr , :
 
 	ret
 END_FUNC get_core_pos_mpidr
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/spin_lock_a64.S b/core/arch/arm/kernel/spin_lock_a64.S
@@ -88,3 +88,5 @@ FUNC __cpu_spin_unlock , :
 	stlr	wzr, [x0]
 	ret
 END_FUNC __cpu_spin_unlock
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/thread_a64.S b/core/arch/arm/kernel/thread_a64.S
@@ -1028,3 +1028,5 @@ LOCAL_FUNC elx_fiq , :
 	native_intr_handler	fiq
 #endif
 END_FUNC elx_fiq
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/thread_optee_smc_a64.S b/core/arch/arm/kernel/thread_optee_smc_a64.S
@@ -236,3 +236,5 @@ FUNC thread_foreign_intr_exit , :
 	smc	#0
 	b	.	/* SMC should not return */
 END_FUNC thread_foreign_intr_exit
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/thread_spmc_a64.S b/core/arch/arm/kernel/thread_spmc_a64.S
@@ -181,3 +181,5 @@ FUNC thread_foreign_intr_exit , :
 	mov	w7, w0
 	b	ffa_msg_send_direct_resp
 END_FUNC thread_foreign_intr_exit
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/tlb_helpers_a64.S b/core/arch/arm/kernel/tlb_helpers_a64.S
@@ -37,3 +37,5 @@ FUNC tlbi_asid , :
 	isb			/* Sync execution on tlb update */
 	ret
 END_FUNC tlbi_asid
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/kernel/vfp_a64.S b/core/arch/arm/kernel/vfp_a64.S
@@ -46,3 +46,5 @@ FUNC vfp_restore_extension_regs , :
 	ldp	q30, q31, [x0, #16 * 30]
 	ret
 END_FUNC vfp_restore_extension_regs
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/core/arch/arm/tee/arch_svc_a64.S b/core/arch/arm/tee/arch_svc_a64.S
@@ -195,3 +195,5 @@ FUNC syscall_panic , :
 	ldr	x3, [x19, #SC_REC_X0] /* pointer to struct thread_svc_regs */
 	b	tee_svc_sys_return_helper
 END_FUNC syscall_panic
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/ldelf/start_a64.S b/ldelf/start_a64.S
@@ -60,3 +60,5 @@ reloc_begin_rel:
 reloc_end_rel:
     .word __reloc_end - reloc_end_rel
 END_FUNC _ldelf_start
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/ldelf/syscalls_a64.S b/ldelf/syscalls_a64.S
@@ -29,3 +29,5 @@
 	END_FUNC _ldelf_panic
 
 #include "syscalls_asm.S"
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/ldelf/tlsdesc_rel_a64.S b/ldelf/tlsdesc_rel_a64.S
@@ -18,3 +18,4 @@ FUNC tlsdesc_resolve , :
 	ret
 END_FUNC tlsdesc_resolve
 
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/lib/libutee/arch/arm/utee_syscalls_a64.S b/lib/libutee/arch/arm/utee_syscalls_a64.S
@@ -46,3 +46,4 @@
 
 #include "utee_syscalls_asm.S"
 
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/lib/libutils/ext/arch/arm/atomic_a64.S b/lib/libutils/ext/arch/arm/atomic_a64.S
@@ -28,3 +28,4 @@ FUNC atomic_dec32 , :
 	ret
 END_FUNC atomic_dec32
 
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/lib/libutils/ext/arch/arm/mcount_a64.S b/lib/libutils/ext/arch/arm/mcount_a64.S
@@ -81,3 +81,5 @@ END_FUNC __ftrace_return
 #endif
 
 #endif /* CFG_TA_GPROF_SUPPORT || CFG_FTRACE_SUPPORT */
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
diff --git a/lib/libutils/ext/include/arm64_bti.S b/lib/libutils/ext/include/arm64_bti.S
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#include <elf_common.h>
+
+/*
+ * This macro emits a program property note section identifying
+ * architecture features which require special handling, mainly for
+ * use in assembly files in the libraries linked with TA's.
+ */
+
+.macro emit_aarch64_feature_1_and, feat
+	.pushsection .note.gnu.property, "a"
+	.align  3
+	.long   2f - 1f				/* n_namesz */
+	.long   6f - 3f				/* n_desc_sz */
+	.long   NT_GNU_PROPERTY_TYPE_0		/* n_type */
+1:      .string "GNU"				/* name */
+2:
+	.align  3
+3:      .long   GNU_PROPERTY_AARCH64_FEATURE_1_AND 	/* pr_type */
+	.long   5f - 4f					/* pr_datasz */
+4:
+	/*
+	 * This is described with an array of char in the Linux API
+	 * spec but the text and all other usage (including binutils,
+	 * clang and GCC) treat this as a 32 bit value so no swizzling
+	 * is required for big endian.
+	 */
+	.long   \feat					/* property */
+5:
+	.align  3
+6:
+	.popsection
+.endm
diff --git a/lib/libutils/ext/include/asm.S b/lib/libutils/ext/include/asm.S
@@ -4,6 +4,10 @@
  * Copyright (c) 2020, Linaro Limited
  */
 
+#if defined(__aarch64__)
+#include <arm64_bti.S>
+#endif
+
 #if defined(__aarch64__) && ((defined(__KERNEL__) && defined(CFG_CORE_BTI)) || \
 			     (!defined(__KERNEL__) && defined(CFG_TA_BTI)))
 #define BTI(...) __VA_ARGS__

diff --git a/lib/libutils/isoc/arch/arm/setjmp_a64.S b/lib/libutils/isoc/arch/arm/setjmp_a64.S
@@ -93,3 +93,5 @@ BTI(	bti	c)
 	// use br not ret, as ret is guaranteed to mispredict
 	br	x30
 	.size	longjmp, .-longjmp
+
+BTI(emit_aarch64_feature_1_and     GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -237,3 +237,5 @@ loop_ic_inv:
		ret

		END_FUNC icache_inv_range

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -576,3 +576,5 @@ SErrorA32:
		check_vector_size SErrorA32

		END_FUNC reset_vect_table

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -51,3 +51,5 @@ WEAK_FUNC get_core_pos_mpidr , :

		ret
		END_FUNC get_core_pos_mpidr

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -29,3 +29,5 @@
		END_FUNC _ldelf_panic

		#include "syscalls_asm.S"

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -18,3 +18,4 @@ FUNC tlsdesc_resolve , :
		ret
		END_FUNC tlsdesc_resolve

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -46,3 +46,4 @@

		#include "utee_syscalls_asm.S"

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -28,3 +28,4 @@ FUNC atomic_dec32 , :
		ret
		END_FUNC atomic_dec32

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
Original file line number	Diff line number	Diff line change
Expand Up		@@ -81,3 +81,5 @@ END_FUNC __ftrace_return
		#endif

		#endif /* CFG_TA_GPROF_SUPPORT \|\| CFG_FTRACE_SUPPORT */

		BTI(emit_aarch64_feature_1_and GNU_PROPERTY_AARCH64_FEATURE_1_BTI)