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Merge tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/ker…
…nel/git/soc/soc
Pull ARM driver updates from Arnd Bergmann:
"The drivers branch for 6.1 is a bit larger than for most releases.
Most of the changes come from SoC maintainers for the drivers/soc
subsystem:
- A new driver for error handling on the NVIDIA Tegra 'control
backbone' bus.
- A new driver for Qualcomm LLCC/DDR bandwidth measurement
- New Rockchip rv1126 and rk3588 power domain drivers
- DT binding updates for memory controllers, older Rockchip SoCs,
various Mediatek devices, Qualcomm SCM firmware
- Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the
Apple rtkit firmware driver, Tegra firmware
- Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra,
Qualcomm, Broadcom, NXP, ...)
There are also some separate subsystem with downstream maintainers
that merge updates this way:
- Various updates and new drivers in the memory controller subsystem
for Mediatek and Broadcom SoCs
- Small set of changes in preparation to add support for FF-A v1.1
specification later, in the Arm FF-A firmware subsystem
- debugfs support in the PSCI firmware subsystem"
* tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits)
ARM: remove check for CONFIG_DEBUG_LL_SER3
firmware/psci: Add debugfs support to ease debugging
firmware/psci: Print a warning if PSCI doesn't accept PC mode
dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props
dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros
dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name
dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support
soc: sunxi: sram: Add support for the D1 system control
soc: sunxi: sram: Export the LDO control register
soc: sunxi: sram: Save a pointer to the OF match data
soc: sunxi: sram: Return void from the release function
soc: apple: rtkit: Add apple_rtkit_poll
soc: imx: add i.MX93 media blk ctrl driver
soc: imx: add i.MX93 SRC power domain driver
soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell
soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets
soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl
soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR
soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl
soc: imx: add icc paths for i.MX8MP media blk ctrl
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,15 @@ | ||
| What: /sys/bus/platform/devices/*/srpd | ||
| Date: July 2022 | ||
| KernelVersion: 5.21 | ||
| Contact: Florian Fainelli <[email protected]> | ||
| Description: | ||
| Self Refresh Power Down (SRPD) inactivity timeout counted in | ||
| internal DDR controller clock cycles. Possible values range | ||
| from 0 (disable inactivity timeout) to 65535 (0xffff). | ||
|
|
||
| What: /sys/bus/platform/devices/*/frequency | ||
| Date: July 2022 | ||
| KernelVersion: 5.21 | ||
| Contact: Florian Fainelli <[email protected]> | ||
| Description: | ||
| DDR PHY frequency in Hz. |
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148 changes: 148 additions & 0 deletions
148
Documentation/devicetree/bindings/firmware/qcom,scm.yaml
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| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | ||
| %YAML 1.2 | ||
| --- | ||
| $id: http://devicetree.org/schemas/firmware/qcom,scm.yaml# | ||
| $schema: http://devicetree.org/meta-schemas/core.yaml# | ||
|
|
||
| title: QCOM Secure Channel Manager (SCM) | ||
|
|
||
| description: | | ||
| Qualcomm processors include an interface to communicate to the secure firmware. | ||
| This interface allows for clients to request different types of actions. | ||
| These can include CPU power up/down, HDCP requests, loading of firmware, | ||
| and other assorted actions. | ||
| maintainers: | ||
| - Bjorn Andersson <[email protected]> | ||
| - Robert Marko <[email protected]> | ||
| - Guru Das Srinagesh <[email protected]> | ||
|
|
||
| properties: | ||
| compatible: | ||
| items: | ||
| - enum: | ||
| - qcom,scm-apq8064 | ||
| - qcom,scm-apq8084 | ||
| - qcom,scm-ipq4019 | ||
| - qcom,scm-ipq6018 | ||
| - qcom,scm-ipq806x | ||
| - qcom,scm-ipq8074 | ||
| - qcom,scm-mdm9607 | ||
| - qcom,scm-msm8226 | ||
| - qcom,scm-msm8660 | ||
| - qcom,scm-msm8916 | ||
| - qcom,scm-msm8953 | ||
| - qcom,scm-msm8960 | ||
| - qcom,scm-msm8974 | ||
| - qcom,scm-msm8976 | ||
| - qcom,scm-msm8994 | ||
| - qcom,scm-msm8996 | ||
| - qcom,scm-msm8998 | ||
| - qcom,scm-sc7180 | ||
| - qcom,scm-sc7280 | ||
| - qcom,scm-sc8280xp | ||
| - qcom,scm-sdm845 | ||
| - qcom,scm-sdx55 | ||
| - qcom,scm-sdx65 | ||
| - qcom,scm-sm6115 | ||
| - qcom,scm-sm6125 | ||
| - qcom,scm-sm6350 | ||
| - qcom,scm-sm8150 | ||
| - qcom,scm-sm8250 | ||
| - qcom,scm-sm8350 | ||
| - qcom,scm-sm8450 | ||
| - qcom,scm-qcs404 | ||
| - const: qcom,scm | ||
|
|
||
| clocks: | ||
| minItems: 1 | ||
| maxItems: 3 | ||
|
|
||
| clock-names: | ||
| minItems: 1 | ||
| maxItems: 3 | ||
|
|
||
| interconnects: | ||
| maxItems: 1 | ||
|
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||
| interconnect-names: | ||
| maxItems: 1 | ||
|
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| '#reset-cells': | ||
| const: 1 | ||
|
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||
| qcom,dload-mode: | ||
| $ref: /schemas/types.yaml#/definitions/phandle-array | ||
| items: | ||
| - items: | ||
| - description: phandle to TCSR hardware block | ||
| - description: offset of the download mode control register | ||
| description: TCSR hardware block | ||
|
|
||
| allOf: | ||
| - if: | ||
| properties: | ||
| compatible: | ||
| contains: | ||
| enum: | ||
| - qcom,scm-apq8064 | ||
| - qcom,scm-msm8660 | ||
| - qcom,scm-msm8960 | ||
| then: | ||
| properties: | ||
| clock-names: | ||
| items: | ||
| - const: core | ||
|
|
||
| clocks: | ||
| maxItems: 1 | ||
|
|
||
| required: | ||
| - clocks | ||
| - clock-names | ||
|
|
||
| - if: | ||
| properties: | ||
| compatible: | ||
| contains: | ||
| enum: | ||
| - qcom,scm-apq8084 | ||
| - qcom,scm-mdm9607 | ||
| - qcom,scm-msm8916 | ||
| - qcom,scm-msm8953 | ||
| - qcom,scm-msm8974 | ||
| - qcom,scm-msm8976 | ||
| then: | ||
| properties: | ||
| clock-names: | ||
| items: | ||
| - const: core | ||
| - const: bus | ||
| - const: iface | ||
|
|
||
| clocks: | ||
| minItems: 3 | ||
| maxItems: 3 | ||
|
|
||
| required: | ||
| - clocks | ||
| - clock-names | ||
|
|
||
| required: | ||
| - compatible | ||
|
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||
| additionalProperties: false | ||
|
|
||
| examples: | ||
| - | | ||
| #include <dt-bindings/clock/qcom,gcc-msm8916.h> | ||
| firmware { | ||
| scm { | ||
| compatible = "qcom,scm-msm8916", "qcom,scm"; | ||
| clocks = <&gcc GCC_CRYPTO_CLK>, | ||
| <&gcc GCC_CRYPTO_AXI_CLK>, | ||
| <&gcc GCC_CRYPTO_AHB_CLK>; | ||
| clock-names = "core", "bus", "iface"; | ||
| }; | ||
| }; |
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