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CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture
Pytorch implementation of the paper "The Devil Is in the Details: Window-based Attention for Image Compression".
Source code for implementing DPU, HDMI and IE on ZCU104 in PYNQ environment
This project aims to enable language model inference on FPGAs, supporting AI applications in edge devices and environments with limited resources.
Out-of-distribution detection, robustness, and generalization resources. The repository contains a curated list of papers, tutorials, books, videos, articles and open-source libraries etc
A open source reimplementation of Google's Tensor Processing Unit (TPU).
The Guidance For Installing dpu and some other stuff On Xilinx ZCU102
Vitis AI is Xilinx’s development stack for AI inference on Xilinx hardware platforms, including both edge devices and Alveo cards.
Collection of FPGA modules for video capture and processing.
HDMI Video Interfacing with ZCU102 using Xilinx IPs
Xilinx FPGA PCIe 保姆级教程 ——基于 PCIe XDMA IP核
Small projects intended to run on the Digilent Zybo development board, utilizing PetaLinux on the Zynq's ARM processor.
A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logi…