AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

Verilog AXI stream components for FPGA implementation

Progressive edge growth PEG for LDPC code construction C++, Matlab PEG with ACE

Collaborative Collection of C++ Best Practices. This online resource is part of Jason Turner's collection of C++ Best Practices resources. See README.md for more information.

Random instruction generator for RISC-V processor verification

🤓 Build your own (insert technology here)

RSD: RISC-V Out-of-Order Superscalar Processor

A LaTeX template for writing thesis in NCTU.

Natural Language Processing Tutorial for Deep Learning Researchers

this repository accompanies the book "Grokking Deep Learning"

主要是紀錄一些 linux 的指令📝

A conda-smithy repository for sage.

Git-Tutorials GIT基本使用教學:memo:

AMBA bus lecture material

Digital Signal Processing - Theory and Computational Examples

Matlab simulations of the encoder and decoder for the New Radio LDPC code from 3GPP Release 15

This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite

a list of machine learning books, covering ML, RL, NLP

Seamless operability between C++11 and Python

Design Pattern that described by Python, This is the source code for the book of Everybody Know Design Patterns.

奔跑吧linux内核

Numerical Software Development

A collection of resources on modern C++

All Algorithms implemented in Python