Tags: wwkkww1983/fpga-drive-aximm-pcie
Tags
added local driver for the PCIe Gen3 core based on driver for the Gen… …2 core added SDK applications for the Gen3 designs modified SDK applications for more comprehensible output simplified the KCU105 LPC design BUG FIX: Gen3 designs now set the BASEADDR and HIGHADDR properties of the axi_pcie3 block because Vivado is not propagating them correctly from the address configuration, see https://forums.xilinx.com/t5/Embedded-Linux/Vivado-2017-1-not-setting-correct-BASEADDR-for-AXI-Bridge-for/m-p/769279#M19963 appended "_pcie" to the names of the KCU105 designs for compatibility with the SDK build script