OcDeviceMiscLib: Implement PCI RBAR configuration support

Docs/Configuration.tex

@@ -1725,6 +1725,21 @@ \subsection{Quirks Properties}\label{booterpropsquirks}
   \texttt{OpenDuetPkg} but may be required to boot macOS 10.6, and earlier, for
   reasons that are as yet unclear.
 
+\item
+  \texttt{ResizeAppleGpuBars}\\
+  \textbf{Type}: \texttt{plist\ integer}\\
+  \textbf{Failsafe}: \texttt{-1}\\
+  \textbf{Description}: Reduce GPU PCI BAR sizes for compatibility with macOS.
+
+  This quirk reduces GPU PCI BAR sizes for Apple macOS up to the specified
+  value or lower if it is unsupported. The specified value follows PCI Resizable
+  BAR spec. Use \texttt{0} for 1 MB, \texttt{1} for 2 MB, \texttt{2}
+  for 4 MB, and so on up to \texttt{19} for 512 GB. Apple macOS supports
+  1 GB maximum, which is \texttt{10}. Use \texttt{-1} to disable this quirk.
+
+  \emph{Note}: See \texttt{ResizeGpuBars} quirk for general GPU PCI BAR
+  size configuration and more details about the technology.
+
 \item
   \texttt{SetupVirtualMap}\\
   \textbf{Type}: \texttt{plist\ boolean}\\
@@ -2584,7 +2599,10 @@ \subsection{Quirks Properties}\label{kernelpropsquirks}
   \textbf{Type}: \texttt{plist\ boolean}\\
   \textbf{Failsafe}: \texttt{false}\\
   \textbf{Requirement}: 10.10\\
-  \textbf{Description}: Increases 32-bit PCI bar size in IOPCIFamily from 1 to 4 GBs.
+  \textbf{Description}: Allows IOPCIFamily to boot with 2 GB PCI BARs.
+
+  Normally macOS restricts PCI BARs to 1 GB. Enabling this option
+  (still) does not let macOS actually use PCI devices with larger BARs.
 
   \emph{Note}: This option should be avoided whenever possible. A need for this option
   indicates misconfigured or defective firmware.
@@ -7652,6 +7670,44 @@ \subsection{Quirks Properties}\label{uefiquirkprops}
   or corrupted in any way.
   \end{itemize}
 
+\item
+  \texttt{ResizeGpuBars}\\
+  \textbf{Type}: \texttt{plist\ integer}\\
+  \textbf{Failsafe}: \texttt{-1}\\
+  \textbf{Description}: Configure GPU PCI BAR sizes.
+
+  This quirk sets GPU PCI BAR sizes as specified or chooses
+  the largest available below the \texttt{ResizeGpuBars} value.
+  The specified value follows PCI Resizable BAR spec.
+  Use \texttt{0} for 1 MB, \texttt{1} for 2 MB, \texttt{2}
+  for 4 MB, and so on up to \texttt{19} for 512 GB.
+
+  Resizable BAR technology allows to ease PCI device programming by mapping
+  a configurable memory region, BAR, into CPU address space (e.g. VRAM to RAM)
+  as opposed to a fixed memory region. This technology is necessary, because
+  one cannot map the largest memory region by default, for the reasons of backwards
+  compatibility with older hardware not supporting 64-bit BARs. Consequentially
+  devices of the last decade use BARs up to 256 MB by default (4 remaining bits are used
+  by other data) but generally allow resizing them to both smaller and larger
+  powers of two (e.g. from 1 MB up to VRAM size).
+
+  Operating systems targeting x86 platforms generally do not control PCI address space,
+  letting UEFI firmware decide on the BAR addresses and sizes. This illicit practice
+  resulted in Resizable BAR technology being unused up until 2020 despite being
+  standardised in 2008 and becoming widely available in the hardware soon after.
+
+  Modern UEFI firmware allow the use of Resizable BAR technology but generally
+  restrict the configurable options to failsafe default (\texttt{OFF})
+  and maximum available (\texttt{ON}). This quirk allows to fine-tune this
+  value for testing and development purposes.
+
+  \emph{Note 1}: This quirk shall not be used to workaround macOS limitation
+  to address BARs over 1 GB. \texttt{ResizeAppleGpuBars} should be used instead.
+
+  \emph{Note 2}: While this quirk can increase GPU PCI BAR sizes, this will not
+  work on most firmware as is, because the quirk does not relocate BARs in memory,
+  and they will likely overlap. Contributions to improve this feature are welcome.
+
 \item
   \texttt{TscSyncTimeout}\\
   \textbf{Type}: \texttt{plist\ integer}\\

Docs/Differences/Differences.tex

@@ -1,7 +1,7 @@
 \documentclass[]{article}
 %DIF LATEXDIFF DIFFERENCE FILE
-%DIF DEL PreviousConfiguration.tex   Tue Oct  5 08:40:27 2021
-%DIF ADD ../Configuration.tex        Fri Oct  8 11:05:42 2021
+%DIF DEL PreviousConfiguration.tex   Mon Oct 11 00:01:52 2021
+%DIF ADD ../Configuration.tex        Mon Oct 11 04:50:40 2021
 
 \usepackage{lmodern}
 \usepackage{amssymb,amsmath}
@@ -1786,7 +1786,25 @@ \subsection{Quirks Properties}\label{booterpropsquirks}
   reasons that are as yet unclear.
 
 \item
-  \texttt{SetupVirtualMap}\\
+  \DIFaddbegin \texttt{\DIFadd{ResizeAppleGpuBars}}\\
+  \textbf{\DIFadd{Type}}\DIFadd{: }\texttt{\DIFadd{plist\ integer}}\\
+  \textbf{\DIFadd{Failsafe}}\DIFadd{: }\texttt{\DIFadd{-1}}\\
+  \textbf{\DIFadd{Description}}\DIFadd{: Reduce GPU PCI BAR sizes for compatibility with macOS.
+}
+
+  \DIFadd{This quirk reduces GPU PCI BAR sizes for Apple macOS up to the specified
+  value or lower if it is unsupported. The specified value follows PCI Resizable
+  BAR spec. Use }\texttt{\DIFadd{0}} \DIFadd{for 1 MB, }\texttt{\DIFadd{1}} \DIFadd{for 2 MB, }\texttt{\DIFadd{2}}
+  \DIFadd{for 4 MB, and so on up to }\texttt{\DIFadd{19}} \DIFadd{for 512 GB. Apple macOS supports
+  1 GB maximum, which is }\texttt{\DIFadd{10}}\DIFadd{. Use }\texttt{\DIFadd{-1}} \DIFadd{to disable this quirk.
+}
+
+  \emph{\DIFadd{Note}}\DIFadd{: See }\texttt{\DIFadd{ResizeGpuBars}} \DIFadd{quirk for general GPU PCI BAR
+  size configuration and more details about the technology.
+}
+
+\item
+  \DIFaddend \texttt{SetupVirtualMap}\\
   \textbf{Type}: \texttt{plist\ boolean}\\
   \textbf{Failsafe}: \texttt{false}\\
   \textbf{Description}: Setup virtual memory at \texttt{SetVirtualAddresses}.
@@ -2644,9 +2662,13 @@ \subsection{Quirks Properties}\label{kernelpropsquirks}
   \textbf{Type}: \texttt{plist\ boolean}\\
   \textbf{Failsafe}: \texttt{false}\\
   \textbf{Requirement}: 10.10\\
-  \textbf{Description}: Increases 32-bit PCI bar size in IOPCIFamily from 1 to 4 GBs.
+  \textbf{Description}: \DIFdelbegin \DIFdel{Increases 32-bit PCI bar size in IOPCIFamily from 1 to 4 GBs}\DIFdelend \DIFaddbegin \DIFadd{Allows IOPCIFamily to boot with 2 GB PCI BARs}\DIFaddend .
+
+  \DIFaddbegin \DIFadd{Normally macOS restricts PCI BARs to 1 GB. Enabling this option
+  (still) does not let macOS actually use PCI devices with larger BARs.
+}
 
-  \emph{Note}: This option should be avoided whenever possible. A need for this option
+  \DIFaddend \emph{Note}: This option should be avoided whenever possible. A need for this option
   indicates misconfigured or defective firmware.
 
 \item
@@ -7830,6 +7852,52 @@ \subsection{Quirks Properties}\label{uefiquirkprops}
   \item Potentially incompatible boot entries, such as macOS entries, are not deleted
   or corrupted in any way.
   \end{itemize}
+\DIFaddbegin 
+
+\item
+  \texttt{\DIFadd{ResizeGpuBars}}\\
+  \textbf{\DIFadd{Type}}\DIFadd{: }\texttt{\DIFadd{plist\ integer}}\\
+  \textbf{\DIFadd{Failsafe}}\DIFadd{: }\texttt{\DIFadd{-1}}\\
+  \textbf{\DIFadd{Description}}\DIFadd{: Configure GPU PCI BAR sizes.
+}
+
+  \DIFadd{This quirk sets GPU PCI BAR sizes as specified or chooses
+  the largest available below the }\texttt{\DIFadd{ResizeGpuBars}} \DIFadd{value.
+  The specified value follows PCI Resizable BAR spec.
+  Use }\texttt{\DIFadd{0}} \DIFadd{for 1 MB, }\texttt{\DIFadd{1}} \DIFadd{for 2 MB, }\texttt{\DIFadd{2}}
+  \DIFadd{for 4 MB, and so on up to }\texttt{\DIFadd{19}} \DIFadd{for 512 GB.
+}
+
+  \DIFadd{Resizable BAR technology allows to ease PCI device programming by mapping
+  a configurable memory region, BAR, into CPU address space (e.g. VRAM to RAM)
+  as opposed to a fixed memory region. This technology is necessary, because
+  one cannot map the largest memory region by default, for the reasons of backwards
+  compatibility with older hardware not supporting 64-bit BARs. Consequentially
+  devices of the last decade use BARs up to 256 MB by default (4 remaining bits are used
+  by other data) but generally allow resizing them to both smaller and larger
+  powers of two (e.g. from 1 MB up to VRAM size).
+}
+
+  \DIFadd{Operating systems targeting x86 platforms generally do not control PCI address space,
+  letting UEFI firmware decide on the BAR addresses and sizes. This illicit practice
+  resulted in Resizable BAR technology being unused up until 2020 despite being
+  standardised in 2008 and becoming widely available in the hardware soon after.
+}
+
+  \DIFadd{Modern UEFI firmware allow the use of Resizable BAR technology but generally
+  restrict the configurable options to failsafe default (}\texttt{\DIFadd{OFF}}\DIFadd{)
+  and maximum available (}\texttt{\DIFadd{ON}}\DIFadd{). This quirk allows to fine-tune this
+  value for testing and development purposes.
+}
+
+  \emph{\DIFadd{Note 1}}\DIFadd{: This quirk shall not be used to workaround macOS limitation
+  to address BARs over 1 GB. }\texttt{\DIFadd{ResizeAppleGpuBars}} \DIFadd{should be used instead.
+}
+
+  \emph{\DIFadd{Note 2}}\DIFadd{: While this quirk can increase GPU PCI BAR sizes, this will not
+  work on most firmware as is, because the quirk does not relocate BARs in memory,
+  and they will likely overlap. Contributions to improve this feature are welcome.
+}\DIFaddend 
 
 \item
   \texttt{TscSyncTimeout}\\

Docs/Sample.plist

@@ -335,6 +335,8 @@
 			<integer>0</integer>
 			<key>RebuildAppleMemoryMap</key>
 			<false/>
+			<key>ResizeAppleGpuBars</key>
+			<integer>-1</integer>
 			<key>SetupVirtualMap</key>
 			<true/>
 			<key>SignalAppleOS</key>
@@ -1575,6 +1577,8 @@
 			<false/>
 			<key>RequestBootVarRouting</key>
 			<true/>
+			<key>ResizeGpuBars</key>
+			<integer>-1</integer>
 			<key>TscSyncTimeout</key>
 			<integer>0</integer>
 			<key>UnblockFsConnect</key>

Docs/SampleCustom.plist

@@ -335,6 +335,8 @@
 			<integer>0</integer>
 			<key>RebuildAppleMemoryMap</key>
 			<false/>
+			<key>ResizeAppleGpuBars</key>
+			<integer>-1</integer>
 			<key>SetupVirtualMap</key>
 			<true/>
 			<key>SignalAppleOS</key>
@@ -1913,6 +1915,8 @@
 			<false/>
 			<key>RequestBootVarRouting</key>
 			<true/>
+			<key>ResizeGpuBars</key>
+			<integer>-1</integer>
 			<key>TscSyncTimeout</key>
 			<integer>0</integer>
 			<key>UnblockFsConnect</key>

Include/Acidanthera/Library/OcAfterBootCompatLib.h

@@ -180,6 +180,10 @@ typedef struct OC_ABC_SETTINGS_ {
   ///
   BOOLEAN  SyncRuntimePermissions;
   ///
+  /// Reduce GPU BARs for macOS to maximum supported version.
+  ///
+  INT8     ResizeAppleGpuBars;
+  ///
   /// List of physical addresses to not be devirtualised by DevirtualiseMmio.
   ///
   EFI_PHYSICAL_ADDRESS *MmioWhitelist;

Include/Acidanthera/Library/OcConfigurationLib.h

@@ -150,6 +150,7 @@
   _(BOOLEAN                     , ProvideCustomSlide        ,     , FALSE  , ()) \
   _(UINT8                       , ProvideMaxSlide           ,     , 0      , ()) \
   _(BOOLEAN                     , RebuildAppleMemoryMap     ,     , FALSE  , ()) \
+  _(INT8                        , ResizeAppleGpuBars        ,     , -1     , ()) \
   _(BOOLEAN                     , SetupVirtualMap           ,     , FALSE  , ()) \
   _(BOOLEAN                     , SignalAppleOS             ,     , FALSE  , ()) \
   _(BOOLEAN                     , SyncRuntimePermissions    ,     , FALSE  , ())
@@ -690,6 +691,7 @@ typedef enum {
   _(BOOLEAN                     , EnableVectorAcceleration    ,     , FALSE  , ()) \
   _(BOOLEAN                     , ForgeUefiSupport            ,     , FALSE  , ()) \
   _(BOOLEAN                     , IgnoreInvalidFlexRatio      ,     , FALSE  , ()) \
+  _(INT8                        , ResizeGpuBars               ,     , -1     , ()) \
   _(BOOLEAN                     , ReleaseUsbOwnership         ,     , FALSE  , ()) \
   _(BOOLEAN                     , ReloadOptionRoms            ,     , FALSE  , ()) \
   _(BOOLEAN                     , RequestBootVarRouting       ,     , FALSE  , ()) \

Include/Acidanthera/Library/OcDeviceMiscLib.h

@@ -99,4 +99,51 @@ OcReloadOptionRoms (
   VOID
   );
 
+/**
+  Valid PCI BAR sizes for PCI 2.0, modern PCI permit up to 8EB.
+**/
+typedef enum {
+  PciBar1MB   =  0,
+  PciBar2MB   =  1,
+  PciBar4MB   =  2,
+  PciBar8MB   =  3,
+  PciBar16MB  =  4,
+  PciBar32MB  =  5,
+  PciBar64MB  =  6,
+  PciBar128MB =  7,
+  PciBar256MB =  8,
+  PciBar512MB =  9,
+  PciBar1GB   = 10,
+  PciBar2GB   = 11,
+  PciBar4GB   = 12,
+  PciBar8GB   = 13,
+  PciBar16GB  = 14,
+  PciBar32GB  = 15,
+  PciBar64GB  = 16,
+  PciBar128GB = 17,
+  PciBar256GB = 18,
+  PciBar512GB = 19,
+
+  PciBarMacMax = PciBar1GB,
+  PciBarTotal  = PciBar512GB + 1,
+} PCI_BAR_SIZE;
+
+/**
+  Resize GPU PCIe BARs up to Size.
+
+  Note: this function can increase RBAR size but it currently does not check
+  whether the resulting BAR will not overlap other device memory.
+  Use with care.
+
+  @param[in]  Size      Maximum BAR size.
+  @param[in]  Increase  Increase BAR size if possible.
+
+  @retval EFI_SUCCESS if at least one BAR resized.
+**/
+EFI_STATUS
+ResizeGpuBars (
+  IN PCI_BAR_SIZE  Size,
+  IN BOOLEAN       Increase
+  );
+
 #endif // OC_DEVICE_MISC_LIB_H

Library/OcAfterBootCompatLib/OcAfterBootCompatLib.c

@@ -127,7 +127,7 @@ OcAbcInitialize (
 
   DEBUG ((
     DEBUG_INFO,
-    "OCABC: FEXITBS %d PRMRG %d CSLIDE %d MSLIDE %d PRSRV %d RBMAP %d VMAP %d APPLOS %d RTPERMS %d\n",
+    "OCABC: FEXITBS %d PRMRG %d CSLIDE %d MSLIDE %d PRSRV %d RBMAP %d VMAP %d APPLOS %d RTPERMS %d ARBAR %d\n",
     Settings->ForceExitBootServices,
     Settings->ProtectMemoryRegions,
     Settings->ProvideCustomSlide,
@@ -136,7 +136,8 @@ OcAbcInitialize (
     Settings->RebuildAppleMemoryMap,
     Settings->SetupVirtualMap,
     Settings->SignalAppleOS,
-    Settings->SyncRuntimePermissions
+    Settings->SyncRuntimePermissions,
+    Settings->ResizeAppleGpuBars
     ));
 
   DEBUG_CODE_BEGIN ();

Library/OcAfterBootCompatLib/ServiceOverrides.c

@@ -26,6 +26,7 @@
 #include <Library/OcBootManagementLib.h>
 #include <Library/OcDebugLogLib.h>
 #include <Library/OcDevicePathLib.h>
+#include <Library/OcDeviceMiscLib.h>
 #include <Library/OcMemoryLib.h>
 #include <Library/OcMiscLib.h>
 #include <Library/OcOSInfoLib.h>
@@ -823,6 +824,11 @@ OcStartImage (
       AppleLoadedImage,
       BootCompat->ServicePtrs.GetMemoryMap
       );
+
+    if (BootCompat->Settings.ResizeAppleGpuBars >= 0
+      && BootCompat->Settings.ResizeAppleGpuBars < PciBarTotal) {
+      ResizeGpuBars (BootCompat->Settings.ResizeAppleGpuBars, FALSE);
+    }
   } else if (BootCompat->Settings.SignalAppleOS) {
     Status = gBS->LocateProtocol (
       &gEfiOSInfoProtocolGuid,

Library/OcConfigurationLib/OcConfigurationLib.c

@@ -195,6 +195,7 @@ mBooterQuirksSchema[] = {
   OC_SCHEMA_BOOLEAN_IN ("ProvideCustomSlide",     OC_GLOBAL_CONFIG, Booter.Quirks.ProvideCustomSlide),
   OC_SCHEMA_INTEGER_IN ("ProvideMaxSlide",        OC_GLOBAL_CONFIG, Booter.Quirks.ProvideMaxSlide),
   OC_SCHEMA_BOOLEAN_IN ("RebuildAppleMemoryMap",  OC_GLOBAL_CONFIG, Booter.Quirks.RebuildAppleMemoryMap),
+  OC_SCHEMA_INTEGER_IN ("ResizeAppleGpuBars",     OC_GLOBAL_CONFIG, Booter.Quirks.ResizeAppleGpuBars),
   OC_SCHEMA_BOOLEAN_IN ("SetupVirtualMap",        OC_GLOBAL_CONFIG, Booter.Quirks.SetupVirtualMap),
   OC_SCHEMA_BOOLEAN_IN ("SignalAppleOS",          OC_GLOBAL_CONFIG, Booter.Quirks.SignalAppleOS),
   OC_SCHEMA_BOOLEAN_IN ("SyncRuntimePermissions", OC_GLOBAL_CONFIG, Booter.Quirks.SyncRuntimePermissions),
@@ -692,6 +693,7 @@ mUefiQuirksSchema[] = {
   OC_SCHEMA_BOOLEAN_IN ("ReleaseUsbOwnership",      OC_GLOBAL_CONFIG, Uefi.Quirks.ReleaseUsbOwnership),
   OC_SCHEMA_BOOLEAN_IN ("ReloadOptionRoms",         OC_GLOBAL_CONFIG, Uefi.Quirks.ReloadOptionRoms),
   OC_SCHEMA_BOOLEAN_IN ("RequestBootVarRouting",    OC_GLOBAL_CONFIG, Uefi.Quirks.RequestBootVarRouting),
+  OC_SCHEMA_INTEGER_IN ("ResizeGpuBars",            OC_GLOBAL_CONFIG, Uefi.Quirks.ResizeGpuBars),
   OC_SCHEMA_INTEGER_IN ("TscSyncTimeout",           OC_GLOBAL_CONFIG, Uefi.Quirks.TscSyncTimeout),
   OC_SCHEMA_BOOLEAN_IN ("UnblockFsConnect",         OC_GLOBAL_CONFIG, Uefi.Quirks.UnblockFsConnect)
 };

Library/OcDeviceMiscLib/OcDeviceMiscLib.inf

@@ -75,3 +75,4 @@
   ReleaseUsbOwnership.c
   ReloadOptionRoms.c
   ResetAudioTrafficClass.c
+  SetResizableBar.c