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ci: Update opcodes
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suehtamacv committed Aug 31, 2023
1 parent 89e4375 commit 0e54f2f
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Showing 4 changed files with 14 additions and 1,349 deletions.
10 changes: 10 additions & 0 deletions .gitlab/.gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -101,6 +101,8 @@ snRuntime-test-vsim:
- $CI_PROJECT_DIR/util/memora_retry.sh get tc-riscv-gcc
# Download bender
- make bender
# Update opcodes
- make update_opcodes
# Download python dependencies
- export PYTHON3=$(which python3.6)
- ${PYTHON3} -m pip install --user jsonref
Expand All @@ -126,6 +128,8 @@ snRuntime-test-vcs:
- $CI_PROJECT_DIR/util/memora_retry.sh get tc-riscv-gcc
# Download bender
- make bender
# Update opcodes
- make update_opcodes
# Download python dependencies
- export PYTHON3=$(which python3.6)
- ${PYTHON3} -m pip install --user jsonref
Expand All @@ -152,6 +156,8 @@ snRuntime-test-vlt:
- $CI_PROJECT_DIR/util/memora_retry.sh get verilator
# Download bender
- make bender
# Update opcodes
- make update_opcodes
# Download python dependencies
- export PYTHON3=$(which python3.6)
- ${PYTHON3} -m pip install --user jsonref
Expand Down Expand Up @@ -179,6 +185,8 @@ riscvTests-test-vlt:
- $CI_PROJECT_DIR/util/memora_retry.sh get verilator
# Download bender
- make bender
# Update opcodes
- make update_opcodes
# Download python dependencies
- export PYTHON3=$(which python3.6)
- ${PYTHON3} -m pip install --user jsonref
Expand Down Expand Up @@ -206,6 +214,8 @@ spatzBenchmarks-test-vlt:
- $CI_PROJECT_DIR/util/memora_retry.sh get verilator
# Download bender
- make bender
# Update opcodes
- make update_opcodes
# Download python dependencies
- export PYTHON3=$(which python3.6)
- ${PYTHON3} -m pip install --user jsonref
Expand Down
4 changes: 2 additions & 2 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -135,11 +135,11 @@ $(VERILATOR_INSTALL_DIR)/bin/verilator: sw/toolchain/verilator sw/toolchain/help
# Opcodes #
#############

update_opcodes: sw/snRuntime/vendor/riscv-opcodes/encoding.h hw/ip/snitch/src/riscv_instr.sv
update_opcodes: sw/toolchain/riscv-opcodes sw/toolchain/riscv-opcodes/encoding.h hw/ip/snitch/src/riscv_instr.sv
hw/ip/snitch/src/riscv_instr.sv: sw/toolchain/riscv-opcodes
MY_OPCODES=$(OPCODES) make -C sw/toolchain/riscv-opcodes inst.sverilog
mv sw/toolchain/riscv-opcodes/inst.sverilog $@

sw/snRuntime/vendor/riscv-opcodes/encoding.h: sw/toolchain/riscv-opcodes/*
sw/toolchain/riscv-opcodes/encoding.h:
MY_OPCODES=$(OPCODES) make -C sw/toolchain/riscv-opcodes all
cp sw/toolchain/riscv-opcodes/encoding_out.h $@
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