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checkasm: add RISC-V vector width to arch info
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Rémi Denis-Courmont committed Nov 17, 2024
1 parent 42dd1f1 commit 55aa81d
Showing 1 changed file with 6 additions and 0 deletions.
6 changes: 6 additions & 0 deletions tests/checkasm/checkasm.c
Original file line number Diff line number Diff line change
Expand Up @@ -96,6 +96,8 @@

#if ARCH_AARCH64
#include "libavutil/aarch64/cpu.h"
#elif ARCH_RISCV
#include "libavutil/riscv/cpu.h"
#endif

#if ARCH_ARM && HAVE_ARMV5TE_EXTERNAL
Expand Down Expand Up @@ -993,6 +995,10 @@ int main(int argc, char *argv[])
if (have_sve(av_get_cpu_flags()))
snprintf(arch_info_buf, sizeof(arch_info_buf),
"SVE %d bits, ", 8 * ff_aarch64_sve_length());
#elif ARCH_RISCV && HAVE_RVV
if (av_get_cpu_flags() & AV_CPU_FLAG_RVV_I32)
snprintf(arch_info_buf, sizeof (arch_info_buf),
"%zu-bit vectors, ", 8 * ff_get_rv_vlenb());
#endif
fprintf(stderr, "checkasm: %susing random seed %u\n", arch_info_buf, seed);
av_lfg_init(&checkasm_lfg, seed);
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