core: add Sparc arch

COMPILE.TXT

@@ -7,12 +7,14 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
 
 (0) Tailor Capstone to your need.
 
-  Out of 5 archtitectures supported by Capstone (Arm, Arm64, Mips, PPC & X86),
-  if you just need several selected archs, you can choose which ones you want
-  to compile in by modifying config.mk before going to next steps.
+  Out of 6 archtitectures supported by Capstone (Arm, Arm64, Mips, PPC, Sparc &
+  X86), if you just need several selected archs, you can choose which ones you
+  want to compile in by modifying "config.mk" before going to next steps.
 
-  By default, all 5 architectures are compiled.
+  By default, all 6 architectures are compiled.
 
+  Capstone also supports "diet" engine to minimize the binaries for embedding
+  purpose. See docs/README for further instructions.
 
 
 (1) Compile from source
@@ -54,6 +56,8 @@ Capstone requires no prerequisite packages, so it is easy to compile & install.
 	/usr/include/capstone/arm64.h
 	/usr/include/capstone/mips.h
 	/usr/include/capstone/ppc.h
+	/usr/include/capstone/sparc.h
+	/usr/include/capstone/diet.h
 	/usr/lib/libcapstone.so (for Linux/*nix), or /usr/lib/libcapstone.dylib (OSX)
 	/usr/lib/libcapstone.a
 

MCInst.h

@@ -128,6 +128,7 @@ typedef struct cs_insn_flat {
 		cs_arm arm;		// ARM architecture (including Thumb/Thumb2)
 		cs_mips mips;	// MIPS architecture
 		cs_ppc ppc;	// PowerPC architecture
+		cs_sparc sparc;	// PowerPC architecture
 	};
 } cs_insn_flat;
 

Makefile

@@ -114,6 +114,23 @@ ifneq (,$(findstring powerpc,$(CAPSTONE_ARCHS)))
 endif
 
 
+DEP_SPARC =
+DEP_SPARC += arch/Sparc/SparcGenAsmWriter.inc
+DEP_SPARC += arch/Sparc/SparcGenInstrInfo.inc
+DEP_SPARC += arch/Sparc/SparcGenSubtargetInfo.inc
+DEP_SPARC += arch/Sparc/SparcGenDisassemblerTables.inc
+DEP_SPARC += arch/Sparc/SparcGenRegisterInfo.inc
+
+LIBOBJ_SPARC =
+ifneq (,$(findstring sparc,$(CAPSTONE_ARCHS)))
+	CFLAGS += -DCAPSTONE_HAS_SPARC
+	LIBOBJ_SPARC += arch/Sparc/SparcDisassembler.o
+	LIBOBJ_SPARC += arch/Sparc/SparcInstPrinter.o
+	LIBOBJ_SPARC += arch/Sparc/SparcMapping.o
+	LIBOBJ_SPARC += arch/Sparc/SparcModule.o
+endif
+
+
 DEP_X86 =
 DEP_X86 += arch/X86/X86GenAsmWriter.inc
 DEP_X86 += arch/X86/X86GenAsmWriter1.inc
@@ -134,7 +151,7 @@ endif
 
 LIBOBJ =
 LIBOBJ += cs.o utils.o SStream.o MCInstrDesc.o MCRegisterInfo.o
-LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_ARM64) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_X86)
+LIBOBJ += $(LIBOBJ_ARM) $(LIBOBJ_ARM64) $(LIBOBJ_MIPS) $(LIBOBJ_PPC) $(LIBOBJ_SPARC) $(LIBOBJ_X86)
 LIBOBJ += MCInst.o
 
 
@@ -202,6 +219,7 @@ $(LIBOBJ_ARM): $(DEP_ARM)
 $(LIBOBJ_ARM64): $(DEP_ARM64)
 $(LIBOBJ_MIPS): $(DEP_MIPS)
 $(LIBOBJ_PPC): $(DEP_PPC)
+$(LIBOBJ_SPARC): $(DEP_SPARC)
 $(LIBOBJ_X86): $(DEP_X86)
 
 # auto-generate include/diet.h

README

@@ -4,7 +4,8 @@ disasm engine for binary analysis and reversing in the security community.
 Created by Nguyen Anh Quynh, then developed and maintained by a small community,
 Capstone offers some unparalleled features:
 
-- Support multiple hardware architectures: ARM, ARM64 (ARMv8), Mips, PPC & X86.
+- Support multiple hardware architectures: ARM, ARM64 (ARMv8), Mips, PPC, Sparc
+  and X86.
 
 - Having clean/simple/lightweight/intuitive architecture-neutral API.
 

arch/Sparc/Sparc.h

@@ -0,0 +1,63 @@
+//===-- Sparc.h - Top-level interface for Sparc representation --*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file contains the entry points for global functions defined in the LLVM
+// Sparc back-end.
+//
+//===----------------------------------------------------------------------===//
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <[email protected]>, 2013-2014 */
+
+#ifndef CS_SPARC_TARGET_SPARC_H
+#define CS_SPARC_TARGET_SPARC_H
+
+#include "../../include/sparc.h"
+
+inline static const char *SPARCCondCodeToString(sparc_cc CC)
+{
+	switch (CC) {
+		default:	return NULL;	// unreachable
+		case SPARC_CC_ICC_A:  return "a";
+		case SPARC_CC_ICC_N:   return "n";
+		case SPARC_CC_ICC_NE:  return "ne";
+		case SPARC_CC_ICC_E:   return "e";
+		case SPARC_CC_ICC_G:   return "g";
+		case SPARC_CC_ICC_LE:  return "le";
+		case SPARC_CC_ICC_GE:  return "ge";
+		case SPARC_CC_ICC_L:   return "l";
+		case SPARC_CC_ICC_GU:  return "gu";
+		case SPARC_CC_ICC_LEU: return "leu";
+		case SPARC_CC_ICC_CC:  return "cc";
+		case SPARC_CC_ICC_CS:  return "cs";
+		case SPARC_CC_ICC_POS: return "pos";
+		case SPARC_CC_ICC_NEG: return "neg";
+		case SPARC_CC_ICC_VC:  return "vc";
+		case SPARC_CC_ICC_VS:  return "vs";
+
+		case SPARC_CC_FCC_A:   return "a";
+		case SPARC_CC_FCC_N:   return "n";
+		case SPARC_CC_FCC_U:   return "u";
+		case SPARC_CC_FCC_G:   return "g";
+		case SPARC_CC_FCC_UG:  return "ug";
+		case SPARC_CC_FCC_L:   return "l";
+		case SPARC_CC_FCC_UL:  return "ul";
+		case SPARC_CC_FCC_LG:  return "lg";
+		case SPARC_CC_FCC_NE:  return "ne";
+		case SPARC_CC_FCC_E:   return "e";
+		case SPARC_CC_FCC_UE:  return "ue";
+		case SPARC_CC_FCC_GE:  return "ge";
+		case SPARC_CC_FCC_UGE: return "uge";
+		case SPARC_CC_FCC_LE:  return "le";
+		case SPARC_CC_FCC_ULE: return "ule";
+		case SPARC_CC_FCC_O:   return "o";
+	}
+}
+
+#endif