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m68knommu: remove unecessary interrupt level setting in ColdFire 520x…
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… setup

The new code for the interrupt controller in the ColdFire 520x takes
care of all the interrupt controller setup. No manual config of the
level registers (ICR) is required by the  platform device setup code.
So remove it.

Signed-off-by: Greg Ungerer <[email protected]>
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gregungerer committed Sep 15, 2009
1 parent de4cbfb commit a3d9bf1
Showing 1 changed file with 0 additions and 9 deletions.
9 changes: 0 additions & 9 deletions arch/m68knommu/platform/520x/config.c
Original file line number Diff line number Diff line change
Expand Up @@ -81,15 +81,11 @@ static struct platform_device *m520x_devices[] __initdata = {

/***************************************************************************/

#define INTC0 (MCF_MBAR + MCFICM_INTC0)

static void __init m520x_uart_init_line(int line, int irq)
{
u16 par;
u8 par2;

writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);

switch (line) {
case 0:
par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
Expand Down Expand Up @@ -128,11 +124,6 @@ static void __init m520x_fec_init(void)
{
u8 v;

/* Unmask FEC interrupts at ColdFire interrupt controller */
writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);

/* Set multi-function pins to ethernet mode */
v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
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