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[SystemZ] Guard LEFR/LFER with FeatureVector
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The LEFR/LFER pseudos are aliases for vector instructions and should
therefore be guared by FeatureVector.  If they aren't, the TableGen
scheduler definition checking might complain that there is no data
for those pseudos for pre-z13 machines.

No functional change intended. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285576 91177308-0d34-0410-b5e6-96231b3b80d8
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uweigand committed Oct 31, 2016
1 parent 19e305e commit 0d70794
Showing 1 changed file with 7 additions and 5 deletions.
12 changes: 7 additions & 5 deletions lib/Target/SystemZ/SystemZInstrVector.td
Original file line number Diff line number Diff line change
Expand Up @@ -1079,11 +1079,13 @@ def : Pat<(v2i64 (z_replicate GR64:$scalar)),

// Moving 32-bit values between GPRs and FPRs can be done using VLVGF
// and VLGVF.
def LEFR : UnaryAliasVRS<VR32, GR32>;
def LFER : UnaryAliasVRS<GR64, VR32>;
def : Pat<(f32 (bitconvert (i32 GR32:$src))), (LEFR GR32:$src)>;
def : Pat<(i32 (bitconvert (f32 VR32:$src))),
(EXTRACT_SUBREG (LFER VR32:$src), subreg_l32)>;
let Predicates = [FeatureVector] in {
def LEFR : UnaryAliasVRS<VR32, GR32>;
def LFER : UnaryAliasVRS<GR64, VR32>;
def : Pat<(f32 (bitconvert (i32 GR32:$src))), (LEFR GR32:$src)>;
def : Pat<(i32 (bitconvert (f32 VR32:$src))),
(EXTRACT_SUBREG (LFER VR32:$src), subreg_l32)>;
}

// Floating-point values are stored in element 0 of the corresponding
// vector register. Scalar to vector conversion is just a subreg and
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