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Commits on Dec 15, 2011

• Move parts of lib/Target that use CodeGen into lib/CodeGen.

  Show description for 028700f
  nlewycky

  committed
  028700f

• Make check a bit more strict so we don't call ARM_AM::getFP32Imm with a value that isn't a 32-bit value. (This is just to be safe; I don't think this actually causes any issues in practice.)

  Show description for 2f21e8c
  eefriedman

  committed
  2f21e8c

• ARM NEON VCLE is an alias for VCGE w/ the source operands reversed.

  Show description for a738da7
  

  Jim Grosbach

  committed
  a738da7

• [asan] add the name of the module to the description of a global variable. This improves the readability of global-buffer-overflow reports.

  Show description for a4b2b1d
  kcc

  committed
  a4b2b1d

• Add MCTargetDesc library to Hexagon target

  Show description for d239ff6
  

  Tony Linthicum

  committed
  d239ff6

• ARM NEON VTBL/VTBX assembly parsing and encoding.

  Show description for 60d99a5
  

  Jim Grosbach

  committed
  60d99a5

• Enable proper constant island alignment by default.

  Show description for b6ff6ec
  stoklund

  committed
  b6ff6ec

• Add missing zmovl AVX patterns which were causing crashes.

  Show description for c8dd201
  

  Chad Rosier

  committed
  c8dd201

• [asan] fix a bug (issue 19) where dlclose and the following mmap caused a false positive. compiler part.

  Show description for 7bcfc99
  kcc

  committed
  7bcfc99

• Silence warning.

  Show description for 276ed03
  

  Jim Grosbach

  committed
  276ed03

• ARM NEON two-register double spaced register list parsing support.

  Show description for 0aaf4cd
  

  Jim Grosbach

  committed
  0aaf4cd

• Fix assert in LowerBUILD_VECTOR for v16i16 type on AVX.

  Show description for 0660cfe
  

  Chad Rosier

  committed
  0660cfe

• Fix VSELECT operand order. Was previously backwards, causing bogus vector shift results - <rdar://problem/10559581>.

  Show description for a0a2513
  lhames

  committed
  a0a2513

• Update DebugLoc while merging nodes at -O0.

  Show description for 0508d04
  

  Devang Patel

  committed
  0508d04

• Virtual table holder field is either metadata or null.

  Show description for 9642c57
  

  Devang Patel

  committed
  9642c57

• Ensure that the nop that should follow a bl call in PPC64 ELF actually does

  Show description for 7f370b6
  

  Hal Finkel

  committed
  7f370b6

• Pass optLevel to XCoreDAGToDAGISel.

  Show description for 27a7859
  

  Richard Osborne

  committed
  27a7859

• Make constant folding for GEPs a bit more aggressive.

  Show description for adeb0a6
  eefriedman

  committed
  adeb0a6

• Don't try to form FGETSIGN after legalization; it is possible in some cases, but the existing code can't do it correctly. PR11570.

  Show description for ca072a3
  eefriedman

  committed
  ca072a3

• Use SmallVector/assign(), rather than std::vector/push_back().

  Show description for 01d426e
  

  Chad Rosier

  committed
  01d426e

• Add support for lowering fneg when AVX is enabled.

  Show description for a860b18
  

  Chad Rosier

  committed
  a860b18

• Added InstCombine for "select cond, ~cond, x" type patterns

  Show description for 4e5a1ab
  cooperp

  committed
  4e5a1ab

• Enable synthesis of FLOG2 and FEXP2 SelectionDAG nodes from libm calls. These are already marked as illegal by default.

  Show description for 4e0adfa
  resistor

  committed
  4e0adfa

• Make loop preheader insertion in LoopSimplify handle the case where the loop header is a landing pad correctly (by splitting the landingpad out of the loop header). Make some adjustments to the res…

  Show description for 7d1ff37
  eefriedman

  committed
  7d1ff37

• Re-re-enable compact unwind after fixing a failure in SingleSource/Benchmarks/Shootout-C++/except.cpp and friends. It was encoding the stored registers in the wrong order.

  Show description for 7a13b72
  isanbard

  committed
  7a13b72

• Another improvement to the implementation of .incbin directive by avoiding a

  Show description for dac2953
  enderby

  committed
  dac2953

Commits on Dec 14, 2011

• The saved registers weren't being processed in the correct order. This lead to

  Show description for 10e412e
  isanbard

  committed
  10e412e

• Move Instruction::isSafeToSpeculativelyExecute out of VMCore and

  Show description for f042660
  

  Dan Gohman

  committed
  f042660

• Consider CPE alignment in CreateNewWater().

  Show description for 299b059
  stoklund

  committed
  299b059

• ARM NEON better assembly operand range checking for lane indices of VLD/VST.

  Show description for 799ca9d
  

  Jim Grosbach

  committed
  799ca9d

• ARM NEON VLD2/VST2 lane indexed assembly parsing and encoding.

  Show description for 9b1b390
  

  Jim Grosbach

  committed
  9b1b390

• Do not sink instruction, if it is not profitable.

  Show description for 5211134
  

  Devang Patel

  committed
  5211134

• Reapply r146481 with a fix to create the Builder value in the correct place and

  Show description for 69fdcd7
  isanbard

  committed
  69fdcd7

• Improve the implementation of .incbin directive by replacing a loop by using

  Show description for c3fc313
  enderby

  committed
  c3fc313

• LSR: Fold redundant bitcasts on-the-fly.

  Show description for 19154f4
  atrick

  committed
  19154f4

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