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Commits on Aug 22, 2013

• Fix ARM vcvt encoding when the number of fractional bits is zero.

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Commits on Aug 21, 2013

• Make "mov" work for all Thumb2 MOV encodings

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Commits on Aug 19, 2013

• Thumb2 add immediate alias for SP

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Commits on Aug 16, 2013

• Add support for Thumb2 literal loads with negative zero offset

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• Fix Thumb2 aliasing complementary instructions taking modified immediates

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Commits on Aug 15, 2013

• This fixes three issues related to Thumb literal loads:

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Commits on Aug 13, 2013

• Fix signed overflow in when computing encodings for ADR instructions

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Commits on Aug 9, 2013

• This fixes the Thumb2 CPS assembly syntax.

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• Fix assembling of Thumb2 branch instructions.

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Commits on Aug 8, 2013

• The name "tCDP" isn't used anywhere else in the source code, so renaming it for consistency doesn't cause any problems.

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Commits on Aug 6, 2013

• This corrects creation of operands for t2PLDW. It also removes the definition of t2PLDWpci,

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• Support APSR_nzcv as operand for Thumb2 mrc. Deprecate pre-UAL syntax (pc instead of apsr_nzcv)

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Commits on Jul 22, 2013

• This adds range checking for "ldr Rn, [pc, #imm]" Thumb

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Commits on Jul 3, 2013

• This corrects the implementation of Thumb ADR instruction. There are three issues:

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Commits on Jun 11, 2013

• It adds support for negative zero offsets for loads and stores.

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• This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions.…

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Commits on Jun 5, 2013

• This is a simple patch that changes RRX and RRXS to accept all registers as operands.

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Commits on May 20, 2013

• VSTn instructions have a number of encoding constraints which are not implemented. I have added these using wrapper methods around the original custom decoder (incidentally - this is a huge poorly …

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• Q registers are encoded in fields of the same length as D registers. As Q registers are half as many, the ARM reference manual mandates the least significant bit to be zeroed out. Failure to do so …

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Commits on May 13, 2013

• The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instructions when they are used to write to the APSR. In this case, the destination operand should be APSR_nzcv, and the encoding o…

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Commits on May 8, 2013

• This patch fixes two tests marked as XFAIL among the ARM assembler tests.

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Commits on Apr 30, 2013

• s tightens up the encoding description for ARM post-indexed ldr instructions. All instructions in this class have bit 4 cleared. It turns out that there is a test case for this, but it was marked X…

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