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Bump firrtl
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Summary of changes:
* Async Reset Register support
* Minor improvements to constant propagation and code generation
* Minor performance improvements
* Add "mverilog" compiler with minimal optimizations
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@jackkoenig
jackkoenig committed Feb 14, 2019
1 parent b7ff1b5 commit 3f3aa35
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion firrtl
Submodule firrtl updated from 50ba95 to 227204

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