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net/mlx5e: Support offloaded TC flows with no matches on headers
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For example:
    tc filter add dev ens2f0_0 parent ffff: flower skip_sw action drop

Note that for eswitch flows, we still always match on the source port.

Signed-off-by: Or Gerlitz <[email protected]>
Reviewed-by: Roi Dayan <[email protected]>
Signed-off-by: Saeed Mahameed <[email protected]>
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ogerlitz authored and Saeed Mahameed committed May 14, 2018
1 parent d708f90 commit 38aa51c
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Showing 3 changed files with 16 additions and 3 deletions.
10 changes: 9 additions & 1 deletion drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,7 @@ struct mlx5_nic_flow_attr {
u32 flow_tag;
u32 mod_hdr_id;
u32 hairpin_tirn;
u8 match_level;
struct mlx5_flow_table *hairpin_ft;
};

Expand Down Expand Up @@ -753,7 +754,9 @@ mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv,
table_created = true;
}

parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
if (attr->match_level != MLX5_MATCH_NONE)
parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;

rule = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec,
&flow_act, dest, dest_ix);

Expand Down Expand Up @@ -1547,6 +1550,11 @@ static int parse_cls_flower(struct mlx5e_priv *priv,
}
}

if (flow->flags & MLX5E_TC_FLOW_ESWITCH)
flow->esw_attr->match_level = match_level;
else
flow->nic_attr->match_level = match_level;

return err;
}

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1 change: 1 addition & 0 deletions drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
Original file line number Diff line number Diff line change
Expand Up @@ -245,6 +245,7 @@ struct mlx5_esw_flow_attr {
bool vlan_handled;
u32 encap_id;
u32 mod_hdr_id;
u8 match_level;
struct mlx5e_tc_flow_parse_attr *parse_attr;
};

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8 changes: 6 additions & 2 deletions drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
Original file line number Diff line number Diff line change
Expand Up @@ -91,8 +91,12 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
MLX5_SET_TO_ONES(fte_match_set_misc, misc, source_port);

spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS |
MLX5_MATCH_MISC_PARAMETERS;
if (attr->match_level == MLX5_MATCH_NONE)
spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS;
else
spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS |
MLX5_MATCH_MISC_PARAMETERS;

if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_DECAP)
spec->match_criteria_enable |= MLX5_MATCH_INNER_HEADERS;

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