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A list of Rosetta examples for run Vitis HLS (High Level Synthesis) more easily.

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Rosetta-flatten

This is a list of Rosetta examples, Specific for run Vitis HLS (High level synthesis) more easily.

What we do

  1. The minimal C++ source and header files required for HLS were extracted from the Rosetta benchmark.

  2. Code Optimization:

  • Conversion of dynamic arrays to static arrays for deterministic resource allocation.
  • Addition of #pragma HLS loop_tripcount to loops with variable trip counts, aiding latency prediction.
  1. Generate the run_hls.tcl for Vitis HLS.

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A list of Rosetta examples for run Vitis HLS (High Level Synthesis) more easily.

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  • Ada 82.0%
  • VHDL 8.7%
  • Verilog 5.2%
  • Tcl 2.1%
  • C++ 2.0%