[PowerPC][NFC] Avoid checking non-relevant .cfi instructions

Summary: This is brought up in https://reviews.llvm.org/D64662?id=209923#inline-599490 CFI information are non-relevant to quite some testcases, we should get rid of checking them when its unecessary. This patch avoid generating cfi info in testcases that are not testing prolog/epilog or exception handling. Reviewers: kbarton, hfinkel, nemanjai, #powerpc Reviewed By: hfinkel Subscribers: MaskRay, shchenz, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D67016 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370505 91177308-0d34-0410-b5e6-96231b3b80d8
zhangboyue · Aug 30, 2019 · 81afa04 · 81afa04
1 parent 338cb73
commit 81afa04
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Showing 16 changed files with 146 additions and 612 deletions.
diff --git a/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll b/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 ; The instructions addis,addi, bl are used to calculate the address of TLS
 ; thread local variables. These TLS access code sequences are generated
@@ -12,13 +13,11 @@
 
 @_ZN2CC2ccE = external thread_local global %"struct.CC::TT", align 8
 
-define noalias i8* @_ZN2CC3funEv(%class.CC* %this) {
+define noalias i8* @_ZN2CC3funEv(%class.CC* %this) nounwind {
 ; CHECK-LABEL: _ZN2CC3funEv:
-; CHECK:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r30, -16
-; CHECK-NEXT:    std 30, -16(1)
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)
 ; CHECK-NEXT:    std 2, 24(1)
@@ -34,15 +33,17 @@ define noalias i8* @_ZN2CC3funEv(%class.CC* %this) {
 ; CHECK-NEXT:    ld 4, 0(3)
 ; CHECK-NEXT:    cmpldi 4, 0
 ; CHECK-NEXT:    beq 0, .LBB0_2
-; CHECK:    addi 4, 3, 8
+; CHECK-NEXT:  # %bb.1: # %if.then
+; CHECK-NEXT:    addi 4, 3, 8
 ; CHECK-NEXT:    mr 3, 30
 ; CHECK-NEXT:    bl _ZN2CC3barEPi
 ; CHECK-NEXT:    nop
-; CHECK:    li 3, 0
+; CHECK-NEXT:  .LBB0_2: # %if.end
+; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    addi 1, 1, 48
 ; CHECK-NEXT:    ld 0, 16(1)
 ; CHECK-NEXT:    mtlr 0
-; CHECK:    ld 30, -16(1)
+; CHECK-NEXT:    ld 30, -16(1) # 8-byte Folded Reload
 ; CHECK-NEXT:    blr
 entry:
   %foo = getelementptr inbounds %class.CC, %class.CC* %this, i64 0, i32 0, i32 0

diff --git a/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll b/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -8,14 +8,12 @@
 @str.1 = private unnamed_addr constant [59 x i8] c"FAILED: __atomic_compare_exchange_n() set the wrong value.\00"
 @str.2 = private unnamed_addr constant [7 x i8] c"PASSED\00"
 
-define signext i32 @main() {
+define signext i32 @main() nounwind {
 ; CHECK-LABEL: main:
 ; CHECK:       # %bb.0: # %L.entry
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    li 3, -32477
 ; CHECK-NEXT:    li 6, 234
 ; CHECK-NEXT:    addi 5, 1, 46
@@ -72,8 +70,6 @@ define signext i32 @main() {
 ; CHECK-P7-NEXT:    mflr 0
 ; CHECK-P7-NEXT:    std 0, 16(1)
 ; CHECK-P7-NEXT:    stdu 1, -48(1)
-; CHECK-P7-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-P7-NEXT:    .cfi_offset lr, 16
 ; CHECK-P7-NEXT:    li 3, -32477
 ; CHECK-P7-NEXT:    lis 5, 0
 ; CHECK-P7-NEXT:    addi 4, 1, 46

diff --git a/test/CodeGen/PowerPC/float-load-store-pair.ll b/test/CodeGen/PowerPC/float-load-store-pair.ll
@@ -25,14 +25,12 @@
 
 ; Because this test function is trying to pass float argument by stack,
 ; so the fpr is only used to load/store float argument
-define signext i32 @test() {
+define signext i32 @test() nounwind {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -192(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 192
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addis 3, 2, a1@toc@ha
 ; CHECK-NEXT:    lfd 1, a1@toc@l(3)
 ; CHECK-NEXT:    addis 3, 2, a2@toc@ha

diff --git a/test/CodeGen/PowerPC/fp-int128-fp-combine.ll b/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
@@ -4,14 +4,12 @@
 ; xscvdpsxds should NOT be emitted, since it saturates the result down to i64.
 ; We can't use friz here because it may return -0.0 where the original code doesn't.
 
-define float @f_i128_f(float %v) {
+define float @f_i128_f(float %v) nounwind {
 ; CHECK-LABEL: f_i128_f:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -32(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    bl __floattisf

diff --git a/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll b/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll
@@ -3,14 +3,12 @@
 ; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs %s | FileCheck %s
 
 ; Function Attrs: nounwind
-define dso_local zeroext i32 @test(i32 signext %l) {
+define dso_local zeroext i32 @test(i32 signext %l) nounwind {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -32(r1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addi r3, r3, -1
 ; CHECK-NEXT:    cmplwi r3, 5
 ; CHECK-NEXT:    bgt cr0, .LBB0_3

diff --git a/test/CodeGen/PowerPC/machine-pre.ll b/test/CodeGen/PowerPC/machine-pre.ll
@@ -54,16 +54,10 @@ return:
   ret i32 %ret
 }
 
-define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) local_unnamed_addr #0 {
+define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) nounwind {
 ; CHECK-P9-LABEL: foo:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mflr r0
-; CHECK-P9-NEXT:    .cfi_def_cfa_offset 80
-; CHECK-P9-NEXT:    .cfi_offset lr, 16
-; CHECK-P9-NEXT:    .cfi_offset r27, -40
-; CHECK-P9-NEXT:    .cfi_offset r28, -32
-; CHECK-P9-NEXT:    .cfi_offset r29, -24
-; CHECK-P9-NEXT:    .cfi_offset r30, -16
 ; CHECK-P9-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
 ; CHECK-P9-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
 ; CHECK-P9-NEXT:    std r29, -24(r1) # 8-byte Folded Spill

diff --git a/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
@@ -196,14 +196,12 @@ define signext i32 @equalityFoldOneConstant(i8* %X) {
   ret i32 %cond
 }
 
-define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) {
+define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {
 ; CHECK-LABEL: length2_eq_nobuiltin_attr:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -32(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    li 5, 2
 ; CHECK-NEXT:    bl memcmp
 ; CHECK-NEXT:    nop

diff --git a/test/CodeGen/PowerPC/pr36292.ll b/test/CodeGen/PowerPC/pr36292.ll
@@ -4,14 +4,10 @@
 $test = comdat any
 
 ; No CTR loop due to frem (since it is always a call).
-define void @test() #0 comdat {
+define void @test() nounwind comdat {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r29, -24
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
@@ -22,7 +18,8 @@ define void @test() #0 comdat {
 ; CHECK-NEXT:    bge- 0, .LBB0_2
 ; CHECK-NEXT:    .p2align 5
 ; CHECK-NEXT:  .LBB0_1: # %bounds.ok
-; CHECK:         lfsx 2, 0, 3
+; CHECK-NEXT:    #
+; CHECK-NEXT:    lfsx 2, 0, 3
 ; CHECK-NEXT:    xxlxor 1, 1, 1
 ; CHECK-NEXT:    bl fmodf
 ; CHECK-NEXT:    nop

diff --git a/test/CodeGen/PowerPC/remove-redundant-load-imm.ll b/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
@@ -9,15 +9,13 @@ target triple = "powerpc64le-unknown-linux-gnu"
 declare void @barney.88(i1, i32*)
 declare void @barney.94(i8*, i32)
 
-define void @redundancy_on_ppc_only(i1 %arg7) {
+define void @redundancy_on_ppc_only(i1 %arg7) nounwind {
 ; PPC64LE-LABEL: redundancy_on_ppc_only:
 ; PPC64LE:       # %bb.0: # %bb
 ; PPC64LE-NEXT:    mflr 0
 ; PPC64LE-NEXT:    andi. 3, 3, 1
 ; PPC64LE-NEXT:    std 0, 16(1)
 ; PPC64LE-NEXT:    stdu 1, -32(1)
-; PPC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PPC64LE-NEXT:    .cfi_offset lr, 16
 ; PPC64LE-NEXT:    li 3, 1
 ; PPC64LE-NEXT:    li 4, 0
 ; PPC64LE-NEXT:    isel 3, 3, 4, 1
@@ -35,14 +33,12 @@ bb10:                                             ; preds = %bb
   ret void
 }
 
-define void @redundancy_on_ppc_and_other_targets() {
+define void @redundancy_on_ppc_and_other_targets() nounwind {
 ; PPC64LE-LABEL: redundancy_on_ppc_and_other_targets:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    mflr 0
 ; PPC64LE-NEXT:    std 0, 16(1)
 ; PPC64LE-NEXT:    stdu 1, -32(1)
-; PPC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PPC64LE-NEXT:    .cfi_offset lr, 16
 ; PPC64LE-NEXT:    addis 3, 2, .LC0@toc@ha
 ; PPC64LE-NEXT:    ld 3, .LC0@toc@l(3)
 ; PPC64LE-NEXT:    li 4, 0

diff --git a/test/CodeGen/PowerPC/sms-cpy-1.ll b/test/CodeGen/PowerPC/sms-cpy-1.ll
@@ -4,14 +4,12 @@
 
 @.str.28 = external unnamed_addr constant [69 x i8], align 1
 
-define void @print_res() unnamed_addr {
+define void @print_res() nounwind {
 ; CHECK-LABEL: print_res:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -128(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 128
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    lwz 3, 0(3)
 ; CHECK-NEXT:    addi 3, 3, -1
 ; CHECK-NEXT:    clrldi 4, 3, 32

diff --git a/test/CodeGen/PowerPC/sms-phi-1.ll b/test/CodeGen/PowerPC/sms-phi-1.ll
@@ -2,13 +2,10 @@
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs\
 ; RUN:       -mcpu=pwr9 --ppc-enable-pipeliner 2>&1 | FileCheck %s
 
-define void @main() local_unnamed_addr #0 {
+define void @main() nounwind #0 {
 ; CHECK-LABEL: main:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)

diff --git a/test/CodeGen/PowerPC/sms-phi-3.ll b/test/CodeGen/PowerPC/sms-phi-3.ll
@@ -5,14 +5,10 @@
 %0 = type { double, double, double, i32, i32 }
 declare i8* @malloc() local_unnamed_addr
 
-define void @phi3(i32*) local_unnamed_addr {
+define void @phi3(i32*) nounwind {
 ; CHECK-LABEL: phi3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r29, -24
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)

diff --git a/test/CodeGen/PowerPC/testComparesi32gtu.ll b/test/CodeGen/PowerPC/testComparesi32gtu.ll
@@ -12,14 +12,12 @@
 declare signext i32 @fn2(...) local_unnamed_addr #1
 
 ; Function Attrs: nounwind
-define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
+define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) nounwind {
 ; BE-LABEL: testCompare1:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    mflr r0
 ; BE-NEXT:    std r0, 16(r1)
 ; BE-NEXT:    stdu r1, -112(r1)
-; BE-NEXT:    .cfi_def_cfa_offset 112
-; BE-NEXT:    .cfi_offset lr, 16
 ; BE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; BE-NEXT:    lbz r3, 0(r3)
 ; BE-NEXT:    ld r4, .LC0@toc@l(r4)
@@ -42,8 +40,6 @@ define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
 ; LE-NEXT:    mflr r0
 ; LE-NEXT:    std r0, 16(r1)
 ; LE-NEXT:    stdu r1, -32(r1)
-; LE-NEXT:    .cfi_def_cfa_offset 32
-; LE-NEXT:    .cfi_offset lr, 16
 ; LE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; LE-NEXT:    lbz r3, 0(r3)
 ; LE-NEXT:    ld r4, .LC0@toc@l(r4)

diff --git a/test/CodeGen/PowerPC/testComparesi32ltu.ll b/test/CodeGen/PowerPC/testComparesi32ltu.ll
@@ -12,14 +12,12 @@
 declare signext i32 @fn2(...) local_unnamed_addr #1
 
 ; Function Attrs: nounwind
-define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
+define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) nounwind {
 ; BE-LABEL: testCompare1:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    mflr r0
 ; BE-NEXT:    std r0, 16(r1)
 ; BE-NEXT:    stdu r1, -112(r1)
-; BE-NEXT:    .cfi_def_cfa_offset 112
-; BE-NEXT:    .cfi_offset lr, 16
 ; BE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; BE-NEXT:    lbz r3, 0(r3)
 ; BE-NEXT:    ld r4, .LC0@toc@l(r4)
@@ -42,8 +40,6 @@ define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
 ; LE-NEXT:    mflr r0
 ; LE-NEXT:    std r0, 16(r1)
 ; LE-NEXT:    stdu r1, -32(r1)
-; LE-NEXT:    .cfi_def_cfa_offset 32
-; LE-NEXT:    .cfi_offset lr, 16
 ; LE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; LE-NEXT:    lbz r3, 0(r3)
 ; LE-NEXT:    ld r4, .LC0@toc@l(r4)

diff --git a/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll b/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
@@ -38,19 +38,6 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
 ; PPC32-NEXT:    mflr 0
 ; PPC32-NEXT:    stw 0, 4(1)
 ; PPC32-NEXT:    stwu 1, -80(1)
-; PPC32-NEXT:    .cfi_def_cfa_offset 80
-; PPC32-NEXT:    .cfi_offset lr, 4
-; PPC32-NEXT:    .cfi_offset r20, -48
-; PPC32-NEXT:    .cfi_offset r21, -44
-; PPC32-NEXT:    .cfi_offset r22, -40
-; PPC32-NEXT:    .cfi_offset r23, -36
-; PPC32-NEXT:    .cfi_offset r24, -32
-; PPC32-NEXT:    .cfi_offset r25, -28
-; PPC32-NEXT:    .cfi_offset r26, -24
-; PPC32-NEXT:    .cfi_offset r27, -20
-; PPC32-NEXT:    .cfi_offset r28, -16
-; PPC32-NEXT:    .cfi_offset r29, -12
-; PPC32-NEXT:    .cfi_offset r30, -8
 ; PPC32-NEXT:    stw 26, 56(1) # 4-byte Folded Spill
 ; PPC32-NEXT:    stw 27, 60(1) # 4-byte Folded Spill
 ; PPC32-NEXT:    stw 29, 68(1) # 4-byte Folded Spill
@@ -178,6 +165,6 @@ start:
 ; Function Attrs: nounwind readnone speculatable
 declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
 
-attributes #0 = { nounwind readnone uwtable }
+attributes #0 = { nounwind readnone }
 attributes #1 = { nounwind readnone speculatable }
 attributes #2 = { nounwind }