brcmnand: Clear EXT_ADDR error registers in PIO mode

If an error occurs in flash above 4GB in PIO mode then the EXT_ADDR registers will be set to the location of the error and never cleared. Reset them to 0 before reading. Signed-off-by: Simon Arlott <[email protected]> Signed-off-by: Brian Norris <[email protected]>
zhenyw · Dec 1, 2015 · 0401669 · 0401669
1 parent fe7579d
commit 0401669
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/drivers/mtd/nand/brcmnand/brcmnand.c b/drivers/mtd/nand/brcmnand/brcmnand.c
@@ -1405,6 +1405,8 @@ static int brcmnand_read_by_pio(struct mtd_info *mtd, struct nand_chip *chip,
 	/* Clear error addresses */
 	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_ADDR, 0);
 	brcmnand_write_reg(ctrl, BRCMNAND_CORR_ADDR, 0);
+	brcmnand_write_reg(ctrl, BRCMNAND_UNCORR_EXT_ADDR, 0);
+	brcmnand_write_reg(ctrl, BRCMNAND_CORR_EXT_ADDR, 0);
 
 	brcmnand_write_reg(ctrl, BRCMNAND_CMD_EXT_ADDRESS,
 			(host->cs << 16) | ((addr >> 32) & 0xffff));