axi_sim_mem: Keep R response stable while not accepted

zhguanw · Mar 9, 2022 · be922cc · be922cc
1 parent e8a48f6
commit be922cc
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diff --git a/CHANGELOG.md b/CHANGELOG.md
@@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 ### Changed
 
 ### Fixed
+- `axi_sim_mem`: Keep R response stable while not accepted.
 
 
 ## 0.34.0 - 2022-03-09

diff --git a/src/axi_sim_mem.sv b/src/axi_sim_mem.sv
@@ -180,13 +180,15 @@ module axi_sim_mem #(
           axi_rsp_o.r = r_beat;
           axi_rsp_o.r_valid = 1'b1;
           #(AcqDelay - ApplDelay);
-          if (axi_req_i.r_ready) begin
-            if (r_beat.last) begin
-              r_cnt = 0;
-              void'(ar_queue.pop_front());
-            end else begin
-              r_cnt++;
-            end
+          while (!axi_req_i.r_ready) begin
+            @(posedge clk_i);
+            #(AcqDelay);
+          end
+          if (r_beat.last) begin
+            r_cnt = 0;
+            void'(ar_queue.pop_front());
+          end else begin
+            r_cnt++;
           end
         end
       end