gdb-xml: fix hacks in powerpc register numbering

The powerpc xml files contained a hack--an empty, non-existent register--for getting the register numbers to line up for newer (XML-aware) and older (non-XML-aware) GDB. While this hack worked in some cases, it didn't work in all cases, notably when the user used `finish' or `continue': GDB would attempt to read the non-existent register and QEMU would complain. This patch fixes things up properly. Instead of inserting a fake register, we explicitly declare the floating-point and SPE registers to start at 71. This action accomplishes the same thing as the nasty hack, except that now GDB never tries to fetch the non-existant register 70. Signed-off-by: Nathan Froyd <[email protected]> Signed-off-by: Aurelien Jarno <[email protected]>
zhijianli88 · Jul 12, 2009 · 2255530 · 2255530
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commit 2255530
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Showing 4 changed files with 2 additions and 20 deletions.
diff --git a/gdb-xml/power-core.xml b/gdb-xml/power-core.xml
@@ -46,13 +46,4 @@
   <reg name="lr" bitsize="32" type="code_ptr"/>
   <reg name="ctr" bitsize="32" type="uint32"/>
   <reg name="xer" bitsize="32" type="uint32"/>
-  <!-- HACK: The way the QEMU GDB stub code is currently written requires
-       the "integer" registers from the XML file to span the entirety of
-       NUM_CORE_REGS that non-XML-aware GDB requires.  Otherwise, XML-aware
-       GDB thinks that "coprocessor" registers from XML, such as the
-       floating-point registers, have register numbers less than
-       NUM_CORE_REGS.  This can lead to problems.  Work around it by using
-       an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
-       this register is 70.  It would be fpscr for non-XML-aware GDB.  -->
-  <reg name="" bitsize="32" type="uint32"/>
 </feature>
diff --git a/gdb-xml/power-fpu.xml b/gdb-xml/power-fpu.xml
@@ -7,7 +7,7 @@
 
 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
 <feature name="org.gnu.gdb.power.fpu">
-  <reg name="f0" bitsize="64" type="ieee_double"/>
+  <reg name="f0" bitsize="64" type="ieee_double" regnum="71"/>
   <reg name="f1" bitsize="64" type="ieee_double"/>
   <reg name="f2" bitsize="64" type="ieee_double"/>
   <reg name="f3" bitsize="64" type="ieee_double"/>

diff --git a/gdb-xml/power-spe.xml b/gdb-xml/power-spe.xml
@@ -7,7 +7,7 @@
 
 <!DOCTYPE feature SYSTEM "gdb-target.dtd">
 <feature name="org.gnu.gdb.power.spe">
-  <reg name="ev0h" bitsize="32"/>
+  <reg name="ev0h" bitsize="32" regnum="71"/>
   <reg name="ev1h" bitsize="32"/>
   <reg name="ev2h" bitsize="32"/>
   <reg name="ev3h" bitsize="32"/>

diff --git a/gdb-xml/power64-core.xml b/gdb-xml/power64-core.xml
@@ -46,13 +46,4 @@
   <reg name="lr" bitsize="64" type="code_ptr"/>
   <reg name="ctr" bitsize="64" type="uint64"/>
   <reg name="xer" bitsize="32" type="uint32"/>
-  <!-- HACK: The way the QEMU GDB stub code is currently written requires
-       the "integer" registers from the XML file to span the entirety of
-       NUM_CORE_REGS that non-XML-aware GDB requires.  Otherwise, XML-aware
-       GDB thinks that "coprocessor" registers from XML, such as the
-       floating-point registers, have register numbers less than
-       NUM_CORE_REGS.  This can lead to problems.  Work around it by using
-       an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
-       this register is 70.  It would be fpscr for non-XML-aware GDB.  -->
-  <reg name="" bitsize="32" type="uint32"/>
 </feature>