DDR3-controller-verification-

DDR3 function verification environment in UVM

Complete environment will be uploaded soon.

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
4096Mb_ddr3_parameters.vh		4096Mb_ddr3_parameters.vh
DDR3_CONTROLLER_MASTER_agent.sv		DDR3_CONTROLLER_MASTER_agent.sv
DDR3_CONTROLLER_MASTER_driver.sv		DDR3_CONTROLLER_MASTER_driver.sv
DDR3_CONTROLLER_MASTER_req_item.sv		DDR3_CONTROLLER_MASTER_req_item.sv
DDR3_CONTROLLER_MASTER_seq_lib.sv		DDR3_CONTROLLER_MASTER_seq_lib.sv
DDR3_CONTROLLER_MASTER_sequencer.sv		DDR3_CONTROLLER_MASTER_sequencer.sv
DDR3_CONTROLLER_clocking_monitor.sv		DDR3_CONTROLLER_clocking_monitor.sv
DDR3_CONTROLLER_env.sv		DDR3_CONTROLLER_env.sv
DDR3_CONTROLLER_if.sv		DDR3_CONTROLLER_if.sv
DDR3_CONTROLLER_pkg.sv		DDR3_CONTROLLER_pkg.sv
DDR3_CONTROLLER_test_lib.sv		DDR3_CONTROLLER_test_lib.sv
DDR3_CONTROLLER_top.sv		DDR3_CONTROLLER_top.sv
README.md		README.md
contlr_write.txt		contlr_write.txt
ddr3.v		ddr3.v

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