Add DEBUG message.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113614 91177308-0d34-0410-b5e6-96231b3b80d8
zoren · Sep 10, 2010 · 4bafda9 · 4bafda9
1 parent 1ec2ee6
commit 4bafda9
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Showing 2 changed files with 16 additions and 4 deletions.
diff --git a/lib/CodeGen/RegAllocFast.cpp b/lib/CodeGen/RegAllocFast.cpp
@@ -798,9 +798,11 @@ void RAFast::AllocateBasicBlock() {
             setPhysReg(MI, i, LRI->second.PhysReg);
           else {
             int SS = StackSlotForVirtReg[Reg];
-            if (SS == -1)
+            if (SS == -1) {
               // We can't allocate a physreg for a DebugValue, sorry!
+              DEBUG(dbgs() << "Unable to allocate vreg used by DBG_VALUE");
               MO.setReg(0);
+            }
             else {
               // Modify DBG_VALUE now that the value is in a spill slot.
               int64_t Offset = MI->getOperand(1).getImm();
@@ -817,9 +819,11 @@ void RAFast::AllocateBasicBlock() {
                 MI = NewDV;
                 ScanDbgValue = true;
                 break;
-              } else
+              } else {
                 // We can't allocate a physreg for a DebugValue; sorry!
+                DEBUG(dbgs() << "Unable to allocate vreg used by DBG_VALUE");
                 MO.setReg(0);
+              }
             }
           }
         }

diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -473,10 +473,18 @@ bool FastISel::SelectCall(const User *I) {
       return true;
     const AllocaInst *AI = dyn_cast<AllocaInst>(Address);
     // Don't handle byval struct arguments or VLAs, for example.
-    if (!AI)
+    if (!AI) {
       // Building the map above is target independent.  Generating DBG_VALUE
       // inline is target dependent; do this now.
-      (void)TargetSelectInstruction(cast<Instruction>(I));
+      DenseMap<const Value *, unsigned>::iterator It =
+        FuncInfo.ValueMap.find(Address);
+      if (0 && It != FuncInfo.ValueMap.end()) {
+        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, 
+                TII.get(TargetOpcode::DBG_VALUE))
+               .addReg(It->second, RegState::Debug).addImm(0).addMetadata(DI->getVariable());
+      } else
+        (void)TargetSelectInstruction(cast<Instruction>(I));
+    }
     return true;
   }
   case Intrinsic::dbg_value: {