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[x86] enable machine combiner reassociations for scalar single-precis…
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…ion minimums

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@245166 91177308-0d34-0410-b5e6-96231b3b80d8
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rotateright committed Aug 15, 2015
1 parent 828f99c commit 8e0b9c2
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Showing 2 changed files with 10 additions and 4 deletions.
6 changes: 6 additions & 0 deletions lib/Target/X86/X86InstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6385,11 +6385,17 @@ static bool hasReassociableSibling(const MachineInstr &Inst, bool &Commuted) {
// TODO: There are many more machine instruction opcodes to match:
// 1. Other data types (integer, vectors)
// 2. Other math / logic operations (and, or)
// 3. Other forms of the same operation (intrinsics and other variants)
static bool isAssociativeAndCommutative(const MachineInstr &Inst) {
switch (Inst.getOpcode()) {
case X86::IMUL16rr:
case X86::IMUL32rr:
case X86::IMUL64rr:
// Normal min/max instructions are not commutative because of NaN and signed
// zero semantics, but these are. Thus, there's no need to check for global
// relaxed math; the instructions themselves have the properties we need.
case X86::MINCSSrr:
case X86::VMINCSSrr:
return true;
case X86::ADDPDrr:
case X86::ADDPSrr:
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8 changes: 4 additions & 4 deletions test/CodeGen/X86/machine-combiner.ll
Original file line number Diff line number Diff line change
Expand Up @@ -358,21 +358,21 @@ define <4 x double> @reassociate_muls_v4f64(<4 x double> %x0, <4 x double> %x1,
ret <4 x double> %t2
}

; TODO: Verify that SSE and AVX scalar single-precision minimum ops are reassociated.
; Verify that SSE and AVX scalar single-precision minimum ops are reassociated.

define float @reassociate_mins_single(float %x0, float %x1, float %x2, float %x3) {
; SSE-LABEL: reassociate_mins_single:
; SSE: # BB#0:
; SSE-NEXT: divss %xmm1, %xmm0
; SSE-NEXT: minss %xmm3, %xmm2
; SSE-NEXT: minss %xmm2, %xmm0
; SSE-NEXT: minss %xmm3, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: reassociate_mins_single:
; AVX: # BB#0:
; AVX-NEXT: vdivss %xmm1, %xmm0, %xmm0
; AVX-NEXT: vminss %xmm0, %xmm2, %xmm0
; AVX-NEXT: vminss %xmm0, %xmm3, %xmm0
; AVX-NEXT: vminss %xmm3, %xmm2, %xmm1
; AVX-NEXT: vminss %xmm1, %xmm0, %xmm0
; AVX-NEXT: retq
%t0 = fdiv float %x0, %x1
%cmp1 = fcmp olt float %x2, %t0
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