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Add generic expansion of SUB when ADD and XOR
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are legal.  Based on a patch by Micah Villmow.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71078 91177308-0d34-0410-b5e6-96231b3b80d8
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CunningBaldrick committed May 6, 2009
1 parent cfd0ebe commit a9cad0e
Showing 1 changed file with 12 additions and 8 deletions.
20 changes: 12 additions & 8 deletions lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3268,8 +3268,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
OpToUse = ISD::UMUL_LOHI;
}
if (OpToUse) {
Result = SDValue(DAG.getNode(OpToUse, dl, VTs, Tmp1, Tmp2).getNode(),
0);
Result = DAG.getNode(OpToUse, dl, VTs, Tmp1, Tmp2);
break;
}
}
Expand All @@ -3289,16 +3288,21 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
}
if (Node->getOpcode() == ISD::SDIV &&
TLI.isOperationLegalOrCustom(ISD::SDIVREM, VT)) {
Result = SDValue(DAG.getNode(ISD::SDIVREM, dl,
VTs, Tmp1, Tmp2).getNode(),
0);
Result = DAG.getNode(ISD::SDIVREM, dl, VTs, Tmp1, Tmp2);
break;
}
if (Node->getOpcode() == ISD::UDIV &&
TLI.isOperationLegalOrCustom(ISD::UDIVREM, VT)) {
Result = SDValue(DAG.getNode(ISD::UDIVREM, dl,
VTs, Tmp1, Tmp2).getNode(),
0);
Result = DAG.getNode(ISD::UDIVREM, dl, VTs, Tmp1, Tmp2);
break;
}
if (Node->getOpcode() == ISD::SUB &&
TLI.isOperationLegalOrCustom(ISD::ADD, VT) &&
TLI.isOperationLegalOrCustom(ISD::XOR, VT)) {
Tmp2 = DAG.getNode(ISD::XOR, dl, VT, Tmp2,
DAG.getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT));
Tmp2 = DAG.getNode(ISD::ADD, dl, VT, Tmp2, DAG.getConstant(1, VT));
Result = DAG.getNode(ISD::ADD, dl, VT, Tmp1, Tmp2);
break;
}

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