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R600/SI: Initailize encoding fields of unused VOP3 modifiers to 0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213564 91177308-0d34-0410-b5e6-96231b3b80d8
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tstellarAMD committed Jul 21, 2014
1 parent 0794af8 commit d7858af
Showing 1 changed file with 5 additions and 0 deletions.
5 changes: 5 additions & 0 deletions lib/Target/R600/SIInstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -316,7 +316,9 @@ multiclass VOP1_Helper <bits<8> op, RegisterClass drc, RegisterClass src,
opName#"_e64 $dst, $src0_modifiers, $clamp, $omod", []
>, VOP <opName> {
let src1 = 0;
let src1_modifiers = 0;
let src2 = 0;
let src2_modifiers = 0;
}
}

Expand Down Expand Up @@ -348,6 +350,7 @@ multiclass VOP2_Helper <bits<6> op, RegisterClass vrc, RegisterClass arc,
opName#"_e64 $dst, $src0_modifiers, $src1_modifiers, $clamp, $omod", []
>, VOP <opName>, VOP2_REV<revOp#"_e64", !eq(revOp, opName)> {
let src2 = 0;
let src2_modifiers = 0;
}
}

Expand Down Expand Up @@ -376,6 +379,7 @@ multiclass VOP2b_32 <bits<6> op, string opName, list<dag> pattern,
opName#"_e64 $dst, $src0_modifiers, $src1_modifiers, $clamp, $omod", []
>, VOP <opName>, VOP2_REV<revOp#"_e64", !eq(revOp, opName)> {
let src2 = 0;
let src2_modifiers = 0;
/* the VOP2 variant puts the carry out into VCC, the VOP3 variant
can write it into any SGPR. We currently don't use the carry out,
so for now hardcode it to VCC as well */
Expand Down Expand Up @@ -440,6 +444,7 @@ class VOP3_64_32 <bits <9> op, string opName, list<dag> pattern> : VOP3 <
>, VOP <opName> {

let src2 = 0;
let src2_modifiers = 0;
let src0_modifiers = 0;
let clamp = 0;
let omod = 0;
Expand Down

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