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Verilog-Projects
Verilog-Projects PublicRepository for Verilog Projects I have completed in my ECEN-248 and ECEN-350 coursework. Each project is stored in its own subdirectory with all Verilog code, testbench files, and simulation result…
Verilog
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Hospital-Patient-Data-System
Hospital-Patient-Data-System PublicProject to create an informatics system for hospital patient data. I worked on this to study how to write system-level C++ code, including managing the filesystem, using pipes, writing into/reading…
C++
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ARMv8-Single-Cycle-Processor
ARMv8-Single-Cycle-Processor PublicProject to create a single-cycle processor in Verilog based on the ArmV8 ISA.
Verilog
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Cpp-Shell
Cpp-Shell PublicA basic shell written in C++ for Unix-based operating systems. I wrote this as a study into using system calls in C++ to interact directly with the Unix operating system.
C++
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Packet-Spoofing-Example
Packet-Spoofing-Example PublicThis project is an basic attack that uses packet spoofing to trick a local server to send data to an attacker. The client, server, and attacker are run in docker containers, and all code is located…
C++
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uYouPlus19.28.1
uYouPlus19.28.1 PublicForked from qnblackcat/uYouPlus
uYou+ is a modified version of uYou (made by @MiRO92) with additional features and mainly made for non jailbroken users!
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