mips: update core. this added bunch of new instructions & groups. upd…

…ated Python & Java bindings accordingly
Kozoro · Aug 14, 2014 · 0f0eb98 · 0f0eb98
1 parent 7c089fd
commit 0f0eb98
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Showing 13 changed files with 14,158 additions and 10,002 deletions.
diff --git a/arch/Mips/MipsDisassembler.c b/arch/Mips/MipsDisassembler.c
diff --git a/arch/Mips/MipsGenAsmWriter.inc b/arch/Mips/MipsGenAsmWriter.inc
diff --git a/arch/Mips/MipsGenDisassemblerTables.inc b/arch/Mips/MipsGenDisassemblerTables.inc
diff --git a/arch/Mips/MipsGenInstrInfo.inc b/arch/Mips/MipsGenInstrInfo.inc
diff --git a/arch/Mips/MipsGenRegisterInfo.inc b/arch/Mips/MipsGenRegisterInfo.inc
diff --git a/arch/Mips/MipsGenSubtargetInfo.inc b/arch/Mips/MipsGenSubtargetInfo.inc
@@ -7,36 +7,46 @@
 \*===----------------------------------------------------------------------===*/
 
 /* Capstone Disassembly Engine, http://www.capstone-engine.org */
-/* By Nguyen Anh Quynh <[email protected]>, 2013> */
+/* By Nguyen Anh Quynh <[email protected]>, 2013-2014 */
 
 
 #ifdef GET_SUBTARGETINFO_ENUM
 #undef GET_SUBTARGETINFO_ENUM
 
-enum {
-  Mips_FeatureBitCount =  1ULL << 0,
-  Mips_FeatureCondMov =  1ULL << 1,
-  Mips_FeatureDSP =  1ULL << 2,
-  Mips_FeatureDSPR2 =  1ULL << 3,
-  Mips_FeatureEABI =  1ULL << 4,
-  Mips_FeatureFP64Bit =  1ULL << 5,
-  Mips_FeatureFPIdx =  1ULL << 6,
-  Mips_FeatureGP64Bit =  1ULL << 7,
-  Mips_FeatureMSA =  1ULL << 8,
-  Mips_FeatureMicroMips =  1ULL << 9,
-  Mips_FeatureMips16 =  1ULL << 10,
-  Mips_FeatureMips32 =  1ULL << 11,
-  Mips_FeatureMips32r2 =  1ULL << 12,
-  Mips_FeatureMips64 =  1ULL << 13,
-  Mips_FeatureMips64r2 =  1ULL << 14,
-  Mips_FeatureN32 =  1ULL << 15,
-  Mips_FeatureN64 =  1ULL << 16,
-  Mips_FeatureO32 =  1ULL << 17,
-  Mips_FeatureSEInReg =  1ULL << 18,
-  Mips_FeatureSingleFloat =  1ULL << 19,
-  Mips_FeatureSwap =  1ULL << 20,
-  Mips_FeatureVFPU =  1ULL << 21
-};
+#define Mips_FeatureCnMips (1ULL << 0)
+#define Mips_FeatureDSP (1ULL << 1)
+#define Mips_FeatureDSPR2 (1ULL << 2)
+#define Mips_FeatureEABI (1ULL << 3)
+#define Mips_FeatureFP64Bit (1ULL << 4)
+#define Mips_FeatureFPXX (1ULL << 5)
+#define Mips_FeatureGP64Bit (1ULL << 6)
+#define Mips_FeatureMSA (1ULL << 7)
+#define Mips_FeatureMicroMips (1ULL << 8)
+#define Mips_FeatureMips1 (1ULL << 9)
+#define Mips_FeatureMips2 (1ULL << 10)
+#define Mips_FeatureMips3 (1ULL << 11)
+#define Mips_FeatureMips3_32 (1ULL << 12)
+#define Mips_FeatureMips3_32r2 (1ULL << 13)
+#define Mips_FeatureMips4 (1ULL << 14)
+#define Mips_FeatureMips4_32 (1ULL << 15)
+#define Mips_FeatureMips4_32r2 (1ULL << 16)
+#define Mips_FeatureMips5 (1ULL << 17)
+#define Mips_FeatureMips5_32r2 (1ULL << 18)
+#define Mips_FeatureMips16 (1ULL << 19)
+#define Mips_FeatureMips32 (1ULL << 20)
+#define Mips_FeatureMips32r2 (1ULL << 21)
+#define Mips_FeatureMips32r6 (1ULL << 22)
+#define Mips_FeatureMips64 (1ULL << 23)
+#define Mips_FeatureMips64r2 (1ULL << 24)
+#define Mips_FeatureMips64r6 (1ULL << 25)
+#define Mips_FeatureN32 (1ULL << 26)
+#define Mips_FeatureN64 (1ULL << 27)
+#define Mips_FeatureNaN2008 (1ULL << 28)
+#define Mips_FeatureNoABICalls (1ULL << 29)
+#define Mips_FeatureNoOddSPReg (1ULL << 30)
+#define Mips_FeatureO32 (1ULL << 31)
+#define Mips_FeatureSingleFloat (1ULL << 32)
+#define Mips_FeatureVFPU (1ULL << 33)
 
 #endif // GET_SUBTARGETINFO_ENUM