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[RISCV] Add specific tests for materialising imm32hi20 constants
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i.e. constants that can be materialised with a single lui, as the lower 12 
bits are zero.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@330274 91177308-0d34-0410-b5e6-96231b3b80d8
asb committed Apr 18, 2018
1 parent ad6944f commit c947c65
Showing 1 changed file with 16 additions and 0 deletions.
16 changes: 16 additions & 0 deletions test/CodeGen/RISCV/imm.ll
Original file line number Diff line number Diff line change
@@ -45,3 +45,19 @@ define i32 @neg_i32() nounwind {
; RV32I-NEXT: ret
ret i32 -559038737
}

define i32 @pos_i32_hi20_only() nounwind {
; RV32I-LABEL: pos_i32_hi20_only:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 16
; RV32I-NEXT: ret
ret i32 65536
}

define i32 @neg_i32_hi20_only() nounwind {
; RV32I-LABEL: neg_i32_hi20_only:
; RV32I: # %bb.0:
; RV32I-NEXT: lui a0, 1048560
; RV32I-NEXT: ret
ret i32 -65536
}

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