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Commits on Oct 23, 2014

• Update llvm.donothing documentation.

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  c08387e

Commits on Oct 17, 2014

• [Stackmaps] Enable invoking the patchpoint intrinsic.

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  32ef687

Commits on Oct 16, 2014

• Reduce code duplication between patchpoint and non-patchpoint lowering. NFC.

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  933d703

• [AArch64] Fix miscompile of sdiv-by-power-of-2.

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  c40dab2

Commits on Oct 15, 2014

• Reapply "[FastISel][AArch64] Add custom lowering for GEPs."

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  7440a83

• [FastISel][AArch64] Factor out add with immediate emission into a helper function. NFC.

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  32c5fde

• Revert "[FastISel][AArch64] Add custom lowering for GEPs."

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  0081070

Commits on Oct 14, 2014

• [FastISel][AArch64] Add custom lowering for GEPs.

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  569c5b6

• [FastISel][AArch64] Fix sign-/zero-extend folding when SelectionDAG is involved.

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  4001708

Commits on Oct 7, 2014

• [FastISel][AArch64] Teach the address computation code to also fold sign-/zero-extends.

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  301d3d0

• [FastISel][AArch64] Teach the address computation to also fold sub instructions.

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  3692081

• [FastISel][AArch64] Fix "Fold sign-/zero-extends into the load instruction."

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  ca07e25

Commits on Oct 2, 2014

• [Stackmaps] Make ithe frame-pointer required for stackmaps.

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  b3f91b0

Commits on Sep 30, 2014

• Recommit r218010 [FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ.

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  9952c92

• [FastISel][AArch64] Fold sign-/zero-extends into the load instruction.

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  a0af4b0

• [FastISel][AArch64] Factor out scale factor calculation. NFC.

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  e8a9706

Commits on Sep 22, 2014

• [FastISel][AArch64] Also allow folding of sign-/zero-extend and shift-left for booleans (i1).

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  af98965

Commits on Sep 19, 2014

• [FastIsel][AArch64] Fix a think-o in address computation.

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  faf93a6

Commits on Sep 18, 2014

• Revert "[FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ."

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  f789dac

• Fix previous commit: [FastISel][AArch64] Simplify XALU multiplies.

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  ef48b51

• [FastISel][AArch64] Simplify XALU multiplies.

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  e7fba00

• [FastISel][AArch64] Followup commit for 218031 to handle negative offsets too.

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  4b6f00a

• [FastISel][AArch64] Try to fold the offset into the add instruction when simplifying a memory address.

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  22b557d

• [FastISel][AArch64] Fold 'AND' instruction during the address computation.

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  ffbd487

• [FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ.

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  710fc31

Commits on Sep 17, 2014

• [FastISel][AArch64] Custom lower sdiv by power-of-2.

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  7516444

• [FastISel][AArch64] Simplify mul to shift when possible.

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  580875d

• [FastISel][AArch64] Fold mul into add/sub and logical operations.

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  committed
  46d6fd2

• [FastISel][AArch64] Fold mul into the address computation of memory operations.

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  5461af9

• [FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.

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  07c9ae5

• [FastISel][AArch64] Improve branch selection to support all FP conditions.

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  17e0ee5

Commits on Sep 16, 2014

• [FastISel][AArch64] Add vector support to argument lowering.

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  c9bc145

Commits on Sep 15, 2014

• [FastISel][AArch64] Add missing test case for previous commit.

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  c0f00e9

• [FastISel][AArch64] Allow handling of vectors during return lowering for little endian machines.

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  488f228

• [FastISel][AArch64] Update function and variable names to follow the coding standard. NFC.

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  d8629f3

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