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Commits on Jul 15, 2014

• [mips] Correct .MIPS.abiflags fp_abi field for -mfpxx and without .module

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  6d6a055

Commits on Jul 14, 2014

• Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags

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  52a51e1

• Revert: [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags

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  b70b489

• [mips] Correct section alignments and EntrySizes for .bss, .text, .data, .reginfo, .MIPS.options, and .MIPS.abiflags

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  05aee6b

• [mips] For the FP64A ABI, odd-numbered double-precision moves must not use mtc1/mfc1.

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  c4ce78e

• [mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves

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  543f70b

• [mips] Correct the AFL_FLAGS1_ODDSPREG flag in .MIPS.abiflags when no '.module oddspreg' is used

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  e99ebb9

Commits on Jul 10, 2014

• [mips] Add support for -modd-spreg/-mno-odd-spreg

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  24a071b

• Make it possible for ints/floats to return different values from getBooleanContents()

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  b0b3161

Commits on Jul 9, 2014

• Add Imagination Technologies to the vendors in llvm::Triple

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  6a65566

• [mips][mips64r6] Correct select patterns that have the condition or true/false values backwards

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  1285b31

• [mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions

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  3887046

• [mips][mips64r6] Use JALR for indirect branches instead of JR (which is not available on MIPS32r6/MIPS64r6)

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  f08bcb9

• [mips][mips64r6] Use JALR for returns instead of JR (which is not available on MIPS32r6/MIPS64r6)

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  7c2ef82

• Add ability to emit internal instruction representation to CodeGen assembly output.

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  3b52084

Commits on Jul 8, 2014

• [mips] Fixed struct/class mismatch introduced in r212522.

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  7a16d24

• Fix r212522 - [mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums

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  3c6b29c

• [mips] Improve encapsulation of the .MIPS.abiflags implementation and limit scope of related enums

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  fbdb8e1

Commits on Jul 4, 2014

• [mips][mips64r6] Set ELF e_flags for MIPS32r6/MIPS64r6. Also do MIPS-I to MIPS-V

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  2093081

• [mips] Add tests for the 'ret', 'call', and 'indirectbr' LLVM IR instruction.

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  8ce13cf

• [mips][mips64r6] Correct the encoding of dmuh, dmuhu, dmul, and dmulu.

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  a39d3ab

Commits on Jun 24, 2014

• Revert: r211588 - [mips] Use __clear_cache builtin instead of cacheflush() in Unix Memory::InvalidateInstructionCache()

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  d3aaad2

• [mips] Added support for assembling sdbbp.

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  90be077

• [mips] Use __clear_cache builtin instead of cacheflush() in Unix Memory::InvalidateInstructionCache()

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  2523346

Commits on Jun 16, 2014

• [mips][mips64r6] ssnop is deprecated on MIPS32r6/MIPS64r6

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  dfcd461

• [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6

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  77ae274

• [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6.

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  af0d72a

• [mips] Merge most of the big/little endian checks in atomic.ll

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  committed
  b0e4096

• [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6

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  5ee24f3

Commits on Jun 13, 2014

• [mips] Add cache and pref instructions

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  7cfd0ff

• [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6

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  ef8e567

• [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal is a normal instruction

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  21ed78f

• [mips][mips64r6] daddi is not available on MIPS64r6

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  21c016f

Commits on Jun 12, 2014

• [mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

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  committed
  1f4c755

• [mips][mips64r6] bc2[ft] are not available on MIPS32r6/MIPS64r6

  Show description for 159b95c
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  159b95c

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