Resources & Notes for learning Norwegian Language

This is the main repository for all the examples for the book Practical UVM

Open FPGA Modules

zynq-soc-hw-sw-design

AXI4 and AXI4-Lite interface definitions

This repo contains tutorials related to Lattice icestick FPGA board

Verilog Configurable Cache

Verilog AXI components for FPGA implementation

i2c master with UVVM I2C BFM used in testbench

A huge VHDL library for FPGA development

Yonga-MCU is a 32-bit RISCV-IMC instruction set compatible SoC design with peripherals like UART, SPI and I2C

UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improv…

PicoRV32 - A Size-Optimized RISC-V CPU

Data Structure and Algorithm (DSA) contributions

Vitis In-Depth Tutorials

Slides for all about HLS webinar

HDL libraries and projects

cryptography ip-cores in vhdl / verilog

Vitis Libraries

A getting started presentation (with examples) about how to use FLOSS for FPGA development.

A testbench for an axi lite custom IP