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Commits on Nov 28, 2017

• Remove this test

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  anemet

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• Fix VS2017 narrowing conversion warning. NFCI

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  RKSimon

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• [X86] Remove unused variable.

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  topperc

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• Demote this opt remark to DEBUG.

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  anemet

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• [X86] Remove code from combineUIntToFP that tried to favor UINT_TO_FP if legal when zero extending from vXi8/vX816.

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• [X86] Remove custom lowering for uint_to_fp from vXi8/vXi16.

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• [globalisel][tablegen] Add support for importing G_ATOMIC_CMPXCHG, G_ATOMICRMW_* rules from SelectionDAG.

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  dsandersllvm

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• SROA: Don't create variable fragments that are outside of the variable.

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  adrian-prantl

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• [cmake] Pass LLVM_USE_LINKER flag when building host tools, e.g.,

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  donhinton

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• [SLP] Additional test for PR35354, NFC.

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  alexey-bataev

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• [Hexagon] Use stable sort for HexagonShuffler to remove non-deterministic ordering

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  Mandeep Singh Grang

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• [aarch64][globalisel] Add missing tests from r319216

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  dsandersllvm

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• [PowerPC] Allow tail calls of fastcc functions from C CallingConv functions.

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  Sean Fertile

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• [aarch64][globalisel] Define G_ATOMIC_CMPXCHG and G_ATOMICRMW_* and make them legal

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  dsandersllvm

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• [SelectionDAG] Make sorting predicate stronger to remove non-deterministic ordering

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  Mandeep Singh Grang

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• [X86][SSE] Add SSE_HADDSUB/SSE_PABS/SSE_PALIGN OpndItins

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  RKSimon

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• [X86] In lowerVectorShuffleAsElementInsertion, if were able to find a scalar i8 or i16 and need to zero extend it, make sure we use a vXi32 type of the full vector width.

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  topperc

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• [CodeGen] Fix doxygen \file comment style

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  francisvm

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• [CodeGen] Fix doxygen

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  francisvm

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• [InstCombine] auto-generate complete test checks; NFC

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  rotateright

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• [Hexagon] Make sure to zero-extend bytes before building a vector

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  Krzysztof Parzyszek

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• [InstCombine] auto-generate complete test checks; NFC

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  rotateright

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• [mir] Print/Parse both MOLoad and MOStore when they occur together.

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  dsandersllvm

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• Fix non assert build warnings.

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  espindola

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• EntryExitInstrumenter: set DebugLocs on the inserted call instructions (PR35412)

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• [CodeView] Refactor / Rewrite TypeSerializer and TypeTableBuilder.

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  Zachary Turner

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• [X86][X87] Tag FP_TO_INT_IN_MEM pseudos with hasNoSchedulingInfo

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  RKSimon

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• [CodeGen] Separate MachineOperand implementation from MachineInstr

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  francisvm

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• [CodeGen] Cleanup MachineOperand

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  francisvm

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• AMDGPU: Add num spilled s/vgprs to metadata

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• Add opt-viewer testing

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  anemet

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• [CodeGen] Print register names in lowercase in both MIR and debug output

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  francisvm

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• [WebAssembly] Support bitcasted function addresses with varargs.

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  Dan Gohman

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• DAG: Legalize truncstores to illegal int types

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  arsenm

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• [X86][X87] Tag FTST x87 instruction scheduler class

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  RKSimon

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