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Stars

8 results for source starred repositories written in Verilog
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XUANTIE-RV / wujian100_open

IC design and development should be faster，simpler and more reliable

Verilog 1,877 573 Updated Dec 31, 2021

ultraembedded / riscv

RISC-V CPU Core (RV32IM)

Verilog 1,303 238 Updated Sep 18, 2021

adki / AMBA_AXI_AHB_APB

AMBA bus lecture material

Verilog 392 129 Updated Jan 21, 2020

risclite / ARM9-compatible-soft-CPU-core

This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your F…

Verilog 76 32 Updated Oct 14, 2020

freecores / dma_ahb

AHB DMA 32 / 64 bits

Verilog 52 21 Updated Jul 17, 2014

freecores / embedded_risc

Embedded 32-bit RISC uProcessor with SDRAM Controller

Verilog 24 6 Updated Sep 2, 2021

C-L-G / My_Opensource_AZPR_SOC

根据最近看的一本书编写的对应RTL以及Testbench

Verilog 19 9 Updated Mar 12, 2017

Ali-Moayed / ARM_CPU

implementation of ARM with Verilog

Verilog 4 2 Updated Dec 24, 2018