Embedded 32-bit RISC uProcessor with SDRAM Controller

AMBA bus lecture material

AHB DMA 32 / 64 bits

RISC-V CPU Core (RV32IM)

根据最近看的一本书编写的对应RTL以及Testbench

This ARMv4-compatible CPU core is written in synthesiable verilog.It could launch uCLinux and Linux in MODELSIM. It has high Dhrystone benchmark value: 1.2 DMIPS/MHz. It could be utilized in your F…

IC design and development should be faster，simpler and more reliable

Answers to Codility's online lesson tasks

LeetCode Solutions: A Record of My Problem Solving Journey.( leetcode题解，记录自己的leetcode解题之路。)

implementation of ARM with Verilog

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform